# Custom FPGA PCB with external programming circuit

My team has verified our logic design on a development board and we are ready to move to a final prototype. Due to the nature of the device, the FPGA board must contain minimal components and be configured via an external programming circuit. The specific technology we have targeted is the Altera Cyclone V but I imagine the same principles could apply to other technology as well. I am looking for advice on the best way to achieve this in terms of time, cost and complexity.

I will focus on the simplest method of programming, which is Active Serial configuration. After scouring the Altera website for a few days this is what I have come up with as design requirements:

-The FPGA cannot hold a design configuration (bitstream) through power off, and thus requires some type of programmable non-volatile memory, such as flash memory.

-There is a simple power-on sequence where the FPGA provides a couple external signals to indicate it is ready to receive a bitstream and also provides a clock via internal oscillator to synchronize itself with the bitstream source.

-The board containing the FPGA must be programmed while attached to an external circuit, removed from the circuit, and placed in a PCB stack containing several other devices that are all operating independently from the FPGA. The FPGA is not controlling any of these other devices, although it does receive control signals in order to synchronize its activity with the overall system.

A few questions I am having difficulty with:

• Are there OTS solutions for FPGA configuration (storage and bitstreaming) or is this something that absolutely requires a custom designed microcontroller solution, such as MSP430/PIC?

• I've looked at the USB blaster chip for a programming circuit solution, but it uses JTAG and interfaces with the FPGA directly. I'm not sure if it is capable of interfacing with a storage device. It provides far more functionality than is needed for this system, and is quite costly (~$300 just for the chip). We don't need to be able to access internal signals using Signal Tap, because our test setup can verify operation using co-simulation. Are there existing devices that I can use, possibly as a paired system (on-board chip plus external programmer chip)? Or, can anyone recommend an alternative approach? I've submitted a support request to Altera, but I doubt they will be interested in helping out a startup like us. Plus, I'm sure there's more expertise available here. Thanks in advance for any helpful advice. You guys are great! • Well, you can get a USB blaster copy from many sources for as low as$10. Most of them are pretty fast and work really good. – FarhadA Nov 30 '13 at 11:23
• How quickly (ms?) do you require the device to be functioning out of power-up reset? There are trade offs to be made: parts are cheaper for SPI configuration but takes a couple of seconds to come up. Altera's CPLD based parallel programming is quicker to DONE state out of reset. – shuckc Jan 13 '14 at 12:19

I think from your question you already understand this, but for clarification, this is my usual terminology:

• Programming implies altering some non-volatile device
• Configuration is what the FPGA does when it starts up - it loads its volatile internal memory from non-volatile external memory.

So, as you surmise, the system needs a non-volatile device of some sort which you program on the production line. To Clarify your comment on the USB blaster, it is not a chip... it's a "pod", so you'd have one for your programming station, not one per board:

Anyway, back to the non-volatile storage options:

• The "Almost-zero-engineering required" approach uses Altera's configuration flash devices, which are JTAG programmable using something like a USB blaster. You just wire them up like the datasheet says, and away you go. They cost more per MBit than other options, though, so are not often used in volume production.

• One more usual approach is a "normal" SPI flash chip. The Cyclone user guide configuration section will list some which are compatible with it, and I believe you can also use the Quartus software to program them via the JTAG of the FPGA they are connected to. More engineering involved, checking you have the right device etc. Also, if you are in volume production, you may not want to be using Quartus on the production line, which which case you may have to provide a separate programming header for the flash chip, and some hardware+software to drive that.

• If you have a microcontroller in your system (even on another board...) you could connect that up to the FPGA's JTAG or configuration pins and store the FPGA bitstream in the micro's flash. More engineering involved as you have to have some software to "boot" the FPGA. however, it can make in-field upgrades easier, as often the micro is set up to receive software upgrades already, whereas updating the flash when it hangs directly off the FPGA is often an "opening the box" experience!

Normally, you would simply include a normal 8-pin SPI flash memory device on the same board as the FPGA — are you saying you can't do this for some reason?

When the FPGA powers up, it will simply start reading data from the first address in the SPI flash and use this data as its configuration bitstream.

To put the bitstream into the flash device, you'd normally just hold the FPGA in reset and access the SPI interface on the flash device directly from some sort of programming header (connector).

• If it is just a matter of a single SPI flash device, then that would be the preferred manner. My concern is whether such device can interface directly to the FPGA. Are you saying that the startup signals from the Cyclone is essentially an SPI interface? – technocratic Nov 28 '13 at 2:17
• Depends on the FPGA. I've used Xilinx, not Altera, so can only comment from that perspective. Xilinx devices can be configured (via pullup/down on config pins) to load themselves from a variety of NV memory devices, including commodity SPI flash, or to wait to be loaded by an MCU or JTAG. It seems likely to me that Altera devices are similar. I would expect there to be doco on the Altera website that explains the configuration options and processes in a fair bit of detail. – markt Nov 28 '13 at 4:58
• I've looked through the Altera configuration documentation on the Cyclone V and their configuration signals do not seem SPI compatible. It seems they sell a proprietary configuration device to support their FPGAs. – technocratic Nov 28 '13 at 21:29

There are "Configuration Devices" of Altera for that purpose.

http://www.altera.com/devices/common/serialcfg/scg-index.html

Have a look at the Cyclone V Handbook, Chapter 7, Fig 7-8. In that configuration, FPGA will load configuration from EPCS device on startup. And to save bitstream to EPCS device, you can use FPGA itself. You load a special design (Serial Flash Loader, I think) to FPGA over JTAG. This forms a bridge between JTAG and EPCS device. Then you can load configuration bitstream to EPCS device over JTAG. I suggest you to read that chapter.

• That looks like exactly what I am looking for! I will take another read through the handbook chapter 7 with this EPCS device in mind. Thanks! – technocratic Nov 28 '13 at 21:28

See the active serial configuration section starting on page 214 of the Cyclone 5 device handbook. This section details how to use the active serial configuration mode. The configuration storage in this instance is some sort of SPI Flash ROM. Altera also produces the EPCS and EPCQ devices for bitstream storage, and the manual also details how to use these devices correctly with the FPGA. The bitstream is programmed into the flash via JTAG through the FPGA - a small 'bridge' configuration is loaded on the FPGA, and then the configuration bitstream is programmed into the flash through the bridge. Then the FPGA will load the configuration from the flash on subsequent power-ups. The default Altera programming software will do this automatically, you just need to tell it what flash chip you're using.