1
\$\begingroup\$

I'm using some CMOS chips (4021 shift bit register, CD74HCT164E serial in parrallel out, 4066 quad billateral switch, etc...)

I'll have some parts of the circuit on or off, but to economize maximum of I/O I try to group a maximum of "common pins". For example the LATCH pin of the 4021 as I will always latch before reading and I only need to read one register at the time, will just ".

Some parts of the circuit will stay off for a long time. I would like to know if I can unpower them but continue to send bits like on the LATCH pin of the 4021 without damaging them ? (Like adding a transistor on the +5V)

\$\endgroup\$
3
\$\begingroup\$

You should not assume that it's safe. Input protection diodes may cause the IC to become powered when inputs are applied.

If you switch to a device family that supports "level 1 live insertion", what Texas Instruments calls "Ioff", then you can apply logic levels to the inputs since they will be high-impedance when VCC is not applied. TI logic families that support Ioff include (but are not limited to) LVC, LVT, and AVC.

Unfortunately the 4021 does not come in any Ioff varieties, and I have been unable to find any other CMOS shift registers that support it. You will need to put another IC in front of it that either supports Ioff or can tri-state the connection if you want to be able remove power from the shift register.

\$\endgroup\$

Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy

Not the answer you're looking for? Browse other questions tagged or ask your own question.