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Are there any FPGAs with a low pin-count (8 to 16) and small package and hopefully cheap (nearly as cheap as a micro)?

It seems that FPGAs are typically intended for massively parallel & fast applications but with high-speed serial links, the pin count and large package size isn't required. PICs and other small micros are typically used for small/cheap logic controllers - and we're currently using a small cheap ARM Cortex STM32 for that purpose - but next I'll need something much faster.

I found a similar question here and the answer was no. If the answer really is no, I wonder why not?

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Nobody really makes an FPGA that small. It's not really enough IO pins to do much of anything with. You can get FPGAs with 32-64 pins, though.

Most of the cost of FPGAs is testing. Each device is tested to ensure that all of the LUTs, flip flops, block RAMs, routing matrix components, transceivers, and IOBs work perfectly for all possible configurations. The devices are also binned into speed grades. This is time consuming, and time is money, so they charge for it. However, some of the smaller Spartan 6 FPGAs only cost around $10 in single unit quantities, which is on par with the price of a microcontroller. You're not going to get one in a DIP package, but you can get the small ones in TQFP packages and then load them onto a breakout board.

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  • \$\begingroup\$ It never occurred to me that testing would be a large contributor to cost. \$\endgroup\$ – JimFred Dec 3 '13 at 23:42
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    \$\begingroup\$ Although twice as many pins as your were looking for, the 32-pin ICE40LP384-SG32 (with 21 I/O pins) costs only $1.65 in single quantities from Digi-Key which is really cheap for an FPGA. \$\endgroup\$ – tcrosley Dec 4 '13 at 5:08
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    \$\begingroup\$ Well, that is a pretty darn good price for an FPGA. I'm trying to figure out right now if the free version of their software supports the ICE40 series FPGAs. It does not appear in either the free nor subscription device list in the brochure. Also, that particular chip has no RAM and no PLL modules. Not sure if that would be a problem for you or not. \$\endgroup\$ – alex.forencich Dec 4 '13 at 6:07
  • \$\begingroup\$ OK - I'm trying a Lattice IceStick with the IceCube2 dev tools. \$\endgroup\$ – JimFred Dec 16 '13 at 21:44
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Why do you assume that with high speed links, a high pin count is not required ? Maybe for your application.

From the several projects I worked on and other I just have been in touch with, here is the scope of use of a FPGA/CPLD with high-speed links :

  • Used as an I/O expander with a CPU/SoC/DSP. The FPGA will, for example, connect multiple high speed links like Gigabit ethernet and will be connected to the CPU through a higher speed link like PCI Express or custom LVDS bus. The FPGA is used as a smart multiplexer. In this case, a high pin count is needed but with few logic gates and internal memory.

  • Used alone : the FPGA serve as the CPU, it will make all the processing. In this case a high pin count and many logic gates and high internal memory or external memory for the processing (which need pins...)

For example I worked on an aerospace deterministic ethernet switch with a high end FPGA : 28 ports @ 1 Gbps + 2 PCI Express links and 2 QDR memories for routing tables and statistics. A very high pin count and a lot of logic gates was needed.

If you don't fit in this two use case, maybe you have a very specific application that the FPGA vendor are not interested in.

Nevertheless I understand your point of view, I worked personnally on a project where we needed a FPGA with many transceivers (up to 20, with up to 10Gbps...) but few logic gates (as it will be used as a smart multiplexer) and we haven't found a reference with a small footprint, many transceivers and few GPIO pins.

As you don't give information on your application (link speed ?) you can take a look at Lattice ICE40 family. I think this will fit your needs.

http://www.latticesemi.com/en/Products/FPGAandCPLD/iCE40.aspx


Edit (explanation about high pin count) :

FPGA tend to have packages with high pin count for some of these reasons:

  • Configuration pins: Most of the FPGA have a JTAG access with dedicated pins. Depending of the model these pins can be used as GPIO (if the JTAG is not used) or are totally dedicated. You will also have some pins used for reset, programming, etc. Sometimes you can have around 10 pins for configuration purpose, if you are lucky these pins are muxed so you can use them as GPIO and configuration pins.

  • Power/GND: This is the most pin-consuming use. FPGA I/Os tend to be organized by banks regrouping pins. As FPGA are used for prototyping, I/O voltage is bank-dependant : each bank has its own power pins so you can have 3.3V signals on some GPIO and another bank with 2.5V or 1.8V. This is very useful when your FPGA make an interface with a recent processor (1.8V or 2.5V I/O voltage) and you have 3.3V chips on your board, the FPGA can be used as a voltage shifter. Also when you have transceivers on your FPGA, the pins are shield with GND pins around.

When you take a FPGA with a BGA package you will have around 30% of the pins used for Power and GND. TQFP and SMD package tend to have less power/GND pins but are more limited in terms of signal integrity.

Also if you have a small package with few pins, let's say 16 pins. If you count about 4 pins for configuration, 4 pins for GND, and 2 pins for core power and I/O power, you already use 10 pins, or 8 if you use only 2 pins for GND, so you will only have 8 dedicated I/Os pins.

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    \$\begingroup\$ link speed: roughly 50 Mb/s LVDS with either Manchester or 8b10b encoding, Qty 2. I didn't realize that the ICE40 family had parts for less than $2. Thx! \$\endgroup\$ – JimFred Dec 3 '13 at 23:38
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    \$\begingroup\$ Ok, I though when you talked about "high-speed" that was at least 100Mb/s. Can you precise your STM32 chip ? Because I'm surprised that the chip is a bit slow, maybe if you have a Cortex M0, you need to upgrade to M3. If your application is not too complex it can fit in a iCE40 or at least the iCE40 can be a good hardware acceleration chip for your microcontroller. \$\endgroup\$ – zeqL Dec 3 '13 at 23:48
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    \$\begingroup\$ Edited my answer to add some explanation about high pin count. If you're looking for a CPLD/FPGA in a DIP package, you can take a look at the Atmel ATF2500C CPLD, it is quite old (10+ years) but maybe it can still fit your need. atmel.com/devices/ATF2500C.aspx \$\endgroup\$ – zeqL Dec 4 '13 at 0:25
  • \$\begingroup\$ It's an STM32F100c8. One operation that is slow is a SPI-like signal that is bit-banged. It's SPI-like in that it has data that's clocked out but there's another signal that, when turned on for 'n' clock pulses, serves as a sort of command that selects an operation. \$\endgroup\$ – JimFred Dec 4 '13 at 19:09
  • \$\begingroup\$ Configuration pins and Power pins: and yet other chips, like PICS and other micros, find a way to share cfg pins for different purposes. \$\endgroup\$ – JimFred Dec 4 '13 at 19:13
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Okay, so I know this is an old thread - but just in case someone else stumbles upon it like I have (I'm also looking for a microcontroller sized FPGA). I've come accross the Lattice XO2 series, which seem to be very applicable to you. They don't have high LUT count (1K-10K order of magnitude), but are extremely cheap (~£5 for a medium powered one, comparable to a mid-range MCU) and even some dev-board have been made (http://tinyfpga.com/) for them, which I've ordered a few of. Hope this helps anyone looking.

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All you want is Altera MAX10 10M02D V36.

10M02D is a low-pin count device of MAX10 family. It is shipped with a WLCSP6x6 0.4mm pitch package of size 3mm x 3mm. It has PLL and High-performance LVDS. I am now planning to build a prototype using this tiny chip. One drawback of using 10M02D is that you have to provide 3.3V, 2.5V, 1.2V power rails.

  1. Now why FPGA favors high pin count? Because it is targeted for hybrid logic operations, pre-processors and bridges. In some high-end applications such as Video, Surveillance, SDR, which requires parallel processing of multiple MDPIs or MSPS ADCs, and then process these data real-time, finally control many-other high-pin ICs. FPGA is best for that.

  2. Now why we need small-pin count FPGAs? Because 1, it's versatile. I myself prefer coding VHDL or system verilog over C. 2, it provides moderate parallel functionality. For example, event detection. And yes! no interrupt is required if you coding event detection logic in FPGA, and it also supports multiple parallel triggers. 3, FPGA can be use as a decoding (logic expanding) device. It can receive high speed LVDS streams and decode them into TTL control logics. Usually 2 pairs in, 16/24 pins out.

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  • \$\begingroup\$ Regarding 'VHDL or system verilog over C', do you have any metrics comparing development time or maintenance effort? I've heard people say that the development time for HDL is 10x more than C but the reliability is also 10x. \$\endgroup\$ – JimFred Jan 14 '17 at 21:49
  • \$\begingroup\$ @JimFred If your code can be devide into some blocks of simple logic and you can draw them down, then VHDL/Verilog is more suited. For example, you want to detect the rising edge of a pin, and commence a I2C with no delay, then VHDL with a sync trigger plus a I2C module is more convenient. Reliability is a coding style, C can also be reliable. But hard-real-time and parallel can be assured in VHDL easily, especially suited for time critical usage. \$\endgroup\$ – liubenyuan Jan 15 '17 at 4:56
  • \$\begingroup\$ And Yes, coding in VHDL is slower than C, especially for sequentially tasks. But with carefully designed IO/Trigger and tested sub-modules, VHDL project can be built up like lego bricks. \$\endgroup\$ – liubenyuan Jan 15 '17 at 4:58
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    \$\begingroup\$ Altera really missed a trick with this one. Such a nice little IC, but they don't do a small package single supply version, so you end up needing three regulators if you want 3.3V logic. And then they don't bother to put it in a sensible package - you can't use the V36 unless you use an expensive fab capable of via in pad BGA. If only they had used something like a QFN or TQFP. \$\endgroup\$ – Tom Carpenter May 1 '18 at 17:20
  • \$\begingroup\$ I agree with you. I am used to the development tools of altera and fpga. It would be much better if they offered single supply, QFN or TQFP packaged, small-pin counts FPGAs. \$\endgroup\$ – liubenyuan May 3 '18 at 0:08
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If you can handle 20 contacts in a 2mm x 3mm speck, there are now several interesting CMICs (Configurable Mixed-signal ICs) in Silego's GreenPAK line. They're not field programable, per se, as their configuration is stored in the unit's one-time programmable NVM rather than external EEPROM or flash. However, their design tools don't suck and their development kit allows one to configure it in-circuit without burning into NVM. I'm not sure if that capability can be deployed to the field if you're looking for something that can switch personalities after deployment.

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