I'm using Altera Quartus II to built a stopper. I'm using 2 counters and I need to choose the right clock rate to get pulse every 1 sec. There are only two options in Quartus for the clock: 27Mhz and 50Mhz. Which one should I use?

  • 4
    \$\begingroup\$ What's a "stopper" ? From the sound of it, it won't really matter, you just choose a counter length to divide the clock by its rate in cycles per second to get an output of one cycle per second. But the slower clock will require less logic and consume less power. You can also use a PLL clock module to generate many more choices in reference to those you list. \$\endgroup\$ – Chris Stratton Dec 9 '13 at 16:43

You'll be able to hit it with either. Assuming you've got your clock rate and counter size is adjusted correctly.

  • If you are using a 32 bit register as the counter you can use a single register at either 50 MHz or 27 MHz.
  • If you are set on using 2 counters, 16 bit registers will work at either 50 MHz or 27 MHz.
    • If you are using 50 MHz, you'll have to count ~763 overflows of a single register
    • 50 MHz
      • 2^16 (register size) = 65536
      • 20 ns * 65536 = 1.3107 ms
      • 1 sec / 0.0013107 sec = 762.93 (value of second register)

I would suggest using a clock divider so that you aren't calling the increment every clock cycle, but that's neither here nor there. If you decide to go that route the math is the same for figuring out your clock rate and register size.

Further, this is all shown for the 50 MHz clock rate, but the math is the same for the 27 MHz rate, I'd honestly suggest the 27 if you're worried about power consumption, but either way is the same logistically.

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