I am having trouble understanding a lecture slide for Mask Programmable Arrays. The cell on the right is supposed to represent a 4-input NOR gate. But I just cant wrap my head around which pads correspond to the NMOS and PMOS transistors. Can someone explain where the transistors are located? Also if they are intrinsically connected to each other.
The large orange rectangles represent groups of transistors. The thin vertical dark green lines are the polysilicon gate terminals, so each vertical line forms the gate of one PMOS and one NMOS, and also wires them together. There is a thin layer of oxide over the orange rectangles and the polysilicon runs on top of that. After the polysilicon is in place, the dopants that make the transistors be P or N type are diffused or implanted into the silicon, so the polysilicon acts like a mask and causes there to be a channel region under each place where the dark green crosses the orange. Now, on either side of the dark green is potentially a transistor drain or source. Physically, they are interchangeable and the same orange bit that is the source of one transistor could be the drain of an adjacent transistor. Then we cover every thing with a thick oxide layer and make holes (contacts) through it down to the silicon source/drain region. Finally a layer of metal runs over everything and connects the transistors as desired. Wherever the light green touches the small dark orange squares there is a connection to a transistor source or drain.