To implement desaturation protection on a switching transistor, one typically sets some manner of comparator to watch the voltage across the current flow terminals of the device. If that voltage exceeds a set level, a fault is thrown and the driver shuts down.
For high-current FETs, carrying hundreds of amps, this poses an interesting challenge. Since Rds(on) in this case is 1.3 mOhm, the difference between the voltages where the device is okay and where the device detonates is relatively small. We're talking about reliably and quickly sensing a ~.2V difference in an environment with very high currents flowing nearby, possibly within an inch on the same circuit board.
Are there any standard techniques for implementing a reliable desat circuit in such a situation? Noise reduction, component selection, shielding, component spacing, PCB design?