I need to make a implementation of a floating point division using System Generator and I my version of System Generator don´t support the 'divider generator' so I was thinking several options to make the implementation. One is using the Xilinx DSP48 block. Does anyone knows if is posible to make a division implementation through a DSP48 xilinx block? Thank you for your help.
\$\begingroup\$
\$\endgroup\$
1
-
\$\begingroup\$ Which size floating point numbers? Do you mean full IEEE 754 floating point? Single precision (32 bit) or half or double precision? \$\endgroup\$– PhilippeCommented Sep 9, 2011 at 7:24
Add a comment
|
3 Answers
\$\begingroup\$
\$\endgroup\$
4
I don't know which Xilinx device you're targeting, but here's an overview page of the Xilinx DSP blocks:
There's a small section about division in the Virtex 5 XtremeDSP user guide (p.74), for example:
However, your best bet is to create a divider using 'coregen'. Launch 'coregen', create a new project and go to 'Math Functions -> Dividers' (the options appear depending on the target device). Then go through the wizard choosing your preferred setup.
Here's a bit more information on how to use 'coregen': 'coregen' will create a '.v' or'.vhd' instantiation file depending on the language you've chosen. It will run XST to generate a '.ncg' "blackbox" netlist so the implementation process can include it when you run 'ngdbuild'.
Now, coregen will also generate a '.xco' and '.cgp', which are the only files you actually need (in ISE version 12.x) in order to regenerate the core. In command line, do
coregen -p <core>.cgp -b <core>.xco
and you'll get the HDL instantiation and the netlist (and a bunch of other things in the process). Note that 'coregen' will generate its output where the input files are, not where it is invoked from, and there's no switch to indicate an output path!
answered Jan 29, 2011 at 12:36
-
\$\begingroup\$ Coregen is available from the version 10.x, isn´t it? My version of System Generator is 9.2.01 : ( \$\endgroup\$ Commented Jan 29, 2011 at 12:47
-
1\$\begingroup\$ coregen has been available from before 9.2 as far as I recall... but then you don't get new cores that were developed since the version you're using, of course. Why don't you upgrade to a newer version? Can you use WebPack at all? \$\endgroup\$ Commented Jan 29, 2011 at 12:52
-
\$\begingroup\$ upgrade my current version will cost montey, won´t it? \$\endgroup\$ Commented Jan 29, 2011 at 13:28
-
2\$\begingroup\$ @Peterstone, not if you can make do with the free Xilinx tools, which are fully functions except that they limit the devices you can target. See more here: xilinx.com/tools/webpack.htm (look at the "product table" to see if the device you're targeting is available through WebPack). \$\endgroup\$ Commented Jan 29, 2011 at 19:12
\$\begingroup\$
\$\endgroup\$
Not directly, but elements of a DSP48 could be used within a larger block to perform floating point division.
answered Sep 9, 2011 at 12:29
\$\begingroup\$
\$\endgroup\$
Almost, you can perform floating point and it can use the DSP48. But it needs more than the DSP48. Details here.
answered Sep 8, 2011 at 19:43