enter image description here

why there are two crystal oscillators connected in parallel in the circuit above? i am familiar with the configuration of Q2( look at the schematic) but what is the purpose of Q3? do i really need to implement it? if yes, why?

the chip is CC430F5133. datasheet

  • 1
    \$\begingroup\$ One or the other is a "Do Not Place" or "Do Not Stuff". That information might be in the BOM for where ever you got that schematic, because it wasn't from the datasheet. The zero ohm resistors are another clue to that. \$\endgroup\$ – Samuel Jan 7 '14 at 19:46
  • \$\begingroup\$ Are you using this in wireless application? Have you try to operate without any crystal connectet or other frequency like 27MHz? \$\endgroup\$ – GR Tech Jan 7 '14 at 20:39
  • \$\begingroup\$ @GRTech There is a separate crystal that is used for the wireless aspect of the chip. \$\endgroup\$ – Kellenjb Jun 10 '14 at 1:10

If I drew a circuit with two crystals connected in parallel it's because on the Bill of Material I would be choosing either one or the other. The PCB layout would be tracked to take version A or version B but only one would be soldered to the PCB. This gives me the ability to buy version B if version A became unavailable.

It's like showing pull-ups and pull-downs on the same IO line - it makes no sense to fit both but, as a design, I may want the option of fitting one or the other.

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Those are crystals or ceramic resonators, not oscillators.

Q2 is a "bare" crystal, and needs the added capacitors to operate correctly.

Q3 appears to have the necessary capacitors internally.

The assembly instructions for the board will say to either install Q3, or install Q2, C441, and C431.

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It is a mistake as shown.
Only one is used. I'm not sure why the osc leads are brought off to a header like that either, poor design for several reasons.
Go back to app note and use that.

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  • 2
    \$\begingroup\$ No, I don't think it is an error. The two pins that the crystal(s) are connected to can also be used as GPIO, if the chip is configured to use an internal clock source. The two resistors R431 and R441 would be installed if the pins were used as GPIO, and removed if either crystal configuration was used. \$\endgroup\$ – Peter Bennett Jan 8 '14 at 1:45
  • \$\begingroup\$ This is not a mistake. The PCB has 2 different footprints with 2 different designators. Schematic reflects that. Although, yes, only one of the footprints is populated in the PCBA. \$\endgroup\$ – Nick Alexeev Jan 8 '14 at 1:45
  • \$\begingroup\$ the osc are two different parts, perhaps they had a parts supply problem, anyhow they still could have combined it into one place on the layout for space reasons, and show one part on the schematic, call out which one by the PL \$\endgroup\$ – Gammara Smith Jan 8 '14 at 2:52
  • \$\begingroup\$ No, they couldn't have. Those are two different parts. \$\endgroup\$ – Ignacio Vazquez-Abrams Jan 8 '14 at 5:07

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