# Stabilizing the UVLO feature on a DC/DC converter

Very many DC/DC controller IC's utilize an under voltage lockout feature by way of an external pin monitoring the applied voltage and comparing it with some internal reference, putting the IC into standby if this threshold is breached. Usually this pin is named "EN" or "UVLO".

I use a high resistance voltage divider to feed the EN pin on my IC. The divider is fed directly from Vin, the battery voltage, and set to output the correct threshold voltage when my batteries are discharged to my pre-defined limit.

When powered from Li-Ion batteries ( and probably any other battery I imagine ), when the threshold voltage is broken, the IC goes into standby mode. This removes the load on the battery, which raises the battery's voltage, which pushes EN over the threshold, and the IC resumes operation again for a few ms.

This cycle continues on and on until the battery, after 100's of 1000's of cycles, finally quits and doesn't bounce back to higher than the EN threshold.

My question is: what are the techniques used to feed the EN/UVLO pins of DC/DC converters to prevent this type of bounce? Is a separate comparator with wide hysteresis used instead of directly feeding EN?

• It should be "easy enough" [tm] to add additional hysteresis. LT8610 datasheet here - Pin 4 UV/EN has "accurate 1V threshold". Add hysteresis based on vout . Needs a small amount of startup shutdown glue possibly all passives. – Russell McMahon Jan 14 '14 at 9:35

Given the additional information that it is an LT8610, there looks like something that can be done.

The EN/UV input has a 1.0V +/-6% threshold and it has almost no (+/-20nA) bias current. That's with the input rising, it's 40mV less typically with the input falling.

You already have a voltage divider on the input. All you need is a resistor from Vout to EN/UV.

simulate this circuit – Schematic created using CircuitLab

When the UV input is RISING, $V_{OUT} = 0$ and thus it will trigger at $V_{IN}$ =$1.0V \cdot$$(R1 + R2 || R3) \over (R2 ||R3)$

It is easy$^{TM}$ to show that the hysteresis: is $0.04V\cdot$ $R1\over R1||R2||R3$ + $V_X \cdot($ $R1 \over R3$), where $V_X$is the output voltage.

• Spehro, this is the exact answer. Thank you very much. Just involves solving the system of equations from KCL. TI has an excellent app note ( ti.com/lit/an/slva373/slva373.pdf ) which details a similar procedure. The only issue left is what to do with a slowly-decaying Vout as would occur with very light load. The output caps would discharge slowly, violating the Vout=0V assumption on the equations. I'm well on my way to polishing this issue into a solution, thanks to you. – smoothVTer Feb 19 '14 at 21:18

Most DC/DC controllers have hysteresis built into the UVLO/EN pin. For example, the TI TPS63061 boost/buck datasheet states:

Under voltage lockout threshold: 1.8 1.9 2.2 V (min/typ/max)

UVLO hysteresis: 300 mV.

Therefore, assuming the 'typical' conditions are in play, when VIN drops below 1.9 V, the device will shut down. It will not resume until the input voltage rises past the threshold+hysteresis voltage - e.g. 1.9+.3 = 2.2 V, which prevents the bounce problem due to removing the load that you have described.

• What I wouldn't do for 300mV of hysteresis! My part in question is LT8610; enable pin hysteresis is only 40mV. I suppose there isn't a way to remedy this easily? – smoothVTer Jan 14 '14 at 0:33
• It seems odd that a chip with UVLO designed for battery use would not have some hysteresis built in, as it seems like a necessary feature. Sometimes the spec is given in terms of separate "rising" and "falling" UVLO voltages (this is how the datasheet for the TPS61200 describes it). Maybe it is hidden somewhere in the "Electrical Characteristics" section, which chip are you using? – Zuofu Jan 14 '14 at 0:38
• I guess you can use a Schmitt trigger buffer (maybe a single channel one such as this: nxp.com/products/logic/schmitt_triggers/series/74LVC1G17.html). It comes in a tiny package and is only 5 pins.. – Zuofu Jan 14 '14 at 0:48