I understand logic gates and their truth tables. However, when it comes to the circuits of the gates, I have trouble understanding them. Could someone please explain how a gate such as the following can be compared to the NAND logic gate?

enter image description here

(original image source Basic Logic Gates and Buffers)


The best way to do this is to analyze each case separately. This gate has two input signals, so only four combinations to analyze. For each case write down the inputs and the resulting output. After the four cases, you have a truth table, which you say you already understand.

Here is the case with both inputs 0:

Both transistors are obviously off, so the pullup drives the output high.

Now do the (1,0) inputs case:

The bottom transistor is obviously off, so again the outut can only be high.

Case (0,1):

Case (1,1):

From these four cases you get the truth table:

  In1  In2  Out
  ---  ---  ---
    0    0    1
    1    0    1
    0    1    1
    1    1    0

which is the NAND function.


When either of the transistors are off (ie, inputs A or B are LOW) the connection between output and ground is open. In that case the output is HIGH. You can better picture this case by removing the transistors from the circuit.

To change that one must turn on both inputs (change both transistor bases signals to HIGH) so that the output gets connected to ground (LOW). You can picture this case by shorting emitter-collector of each transistor, or replacing the connections by a wire.

That's exactly the truth table of a NAND: output is only LOW when both inputs A and B are HIGH.

You don't need to memorise every possible combination of transistors to answer questions like these. To solve problems like the one presented, and this other one linked in a comment below, you should reason like I'm doing here.

You need to understand how a transistor works (as a switch in this case). Then you can then tell whether the transistor is conducting or not. If it is conducting, you can simplify the circuit by replacing the collector-emitter connection with a short (ie., a wire). If it is not conducting, you can replace the connection with an open circuit. Then you solve the resulting circuits.

Of course, I'm oversimplifying things, but only for didactical purposes. Transistors have may other properties that we abstracted here, but that should be considered in real life as it will affect the outcomes of such circuits.

  • \$\begingroup\$ I understand that, I now the gates and stuff. However, for example this is my mock question vvcap.net/db/RgyRxKKMIY3FcAJIQd4e.htp. How am I able to identify what this is -.- \$\endgroup\$ – user2982832 Jan 15 '14 at 11:06
  • \$\begingroup\$ As the mock question does not state which voltage level corresponds to which logical value, it cannot be answered (but only guessed) without further information. \$\endgroup\$ – user_1818839 Jan 15 '14 at 11:14
  • \$\begingroup\$ So, it's about memorising the diagram rather than using information or knowledge to figure it out. If so, wow, that's dumb... \$\endgroup\$ – user2982832 Jan 15 '14 at 12:11
  • \$\begingroup\$ @Ricardo When any of the transistors are off, the output will be left floating. How can the output be deduced as HIGH until and unless there is a pull-up at the output? \$\endgroup\$ – Avin Jan 15 '14 at 12:12
  • \$\begingroup\$ @Avin - The original image (not the mock question) shows the output pulled up by a resistor. I'm assuming that the filled up triangle is a positive voltage source (HIGH). Am I wrong? \$\endgroup\$ – Ricardo Jan 15 '14 at 12:19

All the above answers are correct, but it is worth noting that if you invert both inputs of an OR gate, you get a NAND gate. And if you invert the output of an AND gate, that is another way to get a NAND gate.


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