I'm trying to improve my noobie SMPS design (230v AC -> 60v DC) and i have a major issue with the efficiency. Currently the sim says it outputs 425W while eating 2.2kW, and most of the difference is lost in the main power mosfet.

I think the problem is that the mosfet is always in a half way state but i want it to fully open and close. The mofet(thats supposed to let the ~300V flow through) is being driven by an opamp that gives out 15v but that isnt anywhere near enough to fully open the mosfet for a short burst but rather the current just drips through.. it works but it sucks. What can i do here?

edit: here is the circuit (was an epic mess while i first posted and still kinda is but should be readable)

enter image description here

At the top there is the source, rectifier and a cap to make it look more like dc. Then there are 2 transformers, one is 1:5 for ~60v, other is 1:20 for ~15v then there is the opamp(LT1352CN8) and some 46v zeners, one leads to the main collector cap and the other to the reference voltage from the 60v transformer, the 15v transformer is used for powering the opamp. Then there is C1 and R2 that are supposed to act as a timer.. When the reference voltage goes above C3 voltage, the opamp is supposed to turn on and load up C1 a little bit, C1 in turn would power the mosfet to let voltage through and charge up C3.

I just noticed Q1 is currently getting its source from the 60v transformer, that is wrong, it should be the main ~300v line but i think i was testing something there.

As you probably guessed the problem lies within powering Q1, i've tried a bunch of mosfets and/or configurations of mosfets but all of them either drop the voltage coming from C1 even lower or just leak like crazy.

  • 2
    \$\begingroup\$ Schematic and simulation waveforms... \$\endgroup\$ Commented Jan 18, 2014 at 1:54
  • \$\begingroup\$ using Poweresim? :) Like @Madmanguruman said you need to provide more information, what is the topology of the power-supply, what is the maximum current output current, transistor model? The term for what you want to describe is to operate the transistor saturated and not in the linear region, but if you are using the simulator I said, I don't think this will be the problem. \$\endgroup\$ Commented Jan 18, 2014 at 3:14
  • \$\begingroup\$ Your circuit is acting as a pure linear regulator. 60V/230V ~= 26%. |425/2200 ~= 19%. So you are dropping 230-60 across the FET - using it as a resistor, plus you have some other losses. | Please post your circuit. \$\endgroup\$
    – Russell McMahon
    Commented Jan 18, 2014 at 12:23

1 Answer 1


If, as you say, you are using an op-amp to drive a SMPS MOSFET, that is likely a major problem. You need to drive the gate smartly (hard) in order to have the transistor switch quickly. If it does not switch quickly, it will spend too much time switching, and the power dissipation can be enormous (switching losses are proportional to the switching time, making some assumptions).

A large MOSFET will also have a lot of gate charge that needs to be stuffed in or sucked out of the gate, so the current required is large. A good MOSFET gate driver might have a current capability in the amperes vs. only tens of mA for a typical op-amp. An op-amp will also slew too slowly in general, even without the gate load.

Here is a datasheet for a random gate driver (This one is from Microchip). The output current capability is 9 amperes, and it will switch in 135ns with a 47nF load.

A cheaper driver can be made by complementary emitter-follower BJTs as shown below. It may or may not be adequate, depending on your switching frequency.


simulate this circuit – Schematic created using CircuitLab

Suggest you look at the gate voltage waveforms in your simulation or prototype and improve the driver until you see MOSFET switching losses that are at least in the same range as the theoretical conduction losses: \${I_{RMS}}^2 \times R_{ds(on)}\$, or \${I_{on}}^2 \times R_{ds(on)} \times \dfrac{t_{on}}{t_{off} + t_{on}}\$ if the on current \$I_{on}\$ is fairly constant.

Note that building an actual circuit in this power range or higher is non-trivial, and good layout practices have to be followed. International Rectifier has some excellent application notes.

P.S. Here is an excellent application note that goes into the gory details of MOSFET gate charge.

  • \$\begingroup\$ thanks, i was under the impression that mosfets require almost no current at the gate so i totally overlooked that bit. \$\endgroup\$ Commented Jan 18, 2014 at 4:34
  • \$\begingroup\$ That is true, of course, but only at DC. I'll add a link to my answer that has more than you probably want to know about gate charge. \$\endgroup\$ Commented Jan 18, 2014 at 5:13
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    \$\begingroup\$ +1 A marvellous and very useful and cost effective circuit and surprisingly under-known of. OK at 100 kHz in many cases. Begins to wilt above there. \$\endgroup\$
    – Russell McMahon
    Commented Jan 18, 2014 at 12:22
  • \$\begingroup\$ This was pretty commonly used at my old company, especially for PFC at 60-70kHz. The only addition was a small (1-4 ohm) resistor limiting the supply current to the top transistor collector to prevent transistor damage under some corners. \$\endgroup\$ Commented Jan 18, 2014 at 13:28

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