So the data sheet says that registers cannot be written unless the chip is in standby, however, this seems to suggest that the chip has to be taken out of RX mode to read a packet and clear the RX flags.

This seems a little odd since the TX side of the chip can send up to three packets back-to-back. If a chip TX'd three packets at once and the receiver started processing after the first, the other two would be lost since the receiver wouldn't be in RX mode when the next two arrived.

Is the data sheet overly prescriptive on this point? Is it possible to drain the RX FIFOs while staying in RX mode? Any hands-on experience?

  • \$\begingroup\$ "registers cannot be written unless the chip is in standby": can you give the link to the datasheet, and the page where you found this? IME (with RFM73 modules, which are a sort-of clones) this is definitely not needed. \$\endgroup\$ – Wouter van Ooijen Jan 27 '14 at 8:02
  • \$\begingroup\$ The data sheet is linked to on this page: nordicsemi.com/eng/Products/2.4GHz-RF/nRF24L01P \$\endgroup\$ – Logan Bowers Jan 31 '14 at 19:58
  • \$\begingroup\$ Section 8.3.2: "SPI operation and timing is shown in Figure 26. to Figure 28. and in Table 22. to Table 27.. nRF24L01+ must be in a standby or power down mode before writing to the configuration registers." \$\endgroup\$ – Logan Bowers Jan 31 '14 at 20:04

Yeah, that is indeed confusing. It has been a while since I read that document (I am more familiar with the RFM73 clone), but note that sentence states configuration registers, while 8.3.1 talks about command and status registers.

My best guess is that the limitation applies to a small subset of the registers, probably only the CONFIG register. Or it is a sentence that was left in the datasheet totally by accident. Note that it contradicts the 3d paragraph of the introduction.

I have used this chip briefly (mainly to test whether it is compatible with the RFM73 - it is), but I never had to put the chip in standby to do reading or writing of the packets.

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