Not entirely sure which stack site to post this question to, but I'll give this section a whirl. I have a question on my homework which reads as follows:

Instruction Set Architecture. You are designing the instruction set for a new type of computer. The computer has 64 instructions, 16 general-purpose registers. It supports a byte-addressable memory of up-to 32MB. Answer the following questions.

a. For a 3-operand ADD instruction that only uses register addressing mode, how long (number of bits) should the instruction be?

b. For a 2-operand ADD instruction, in which one of the operands is a memory location with direct addressing mode, how long (number of bits) should the instruction be?

Without completely giving the answer away, can someone help explain just what the question is exactly asking. I can't seem to grasp the concept.

Thanks again.


migrated from scicomp.stackexchange.com Jan 29 '14 at 2:24

This question came from our site for scientists using computers to solve scientific problems.

  • \$\begingroup\$ Welcome to SciComp! This sort of question is probably better asked at Electrical Engineering Stack Exchange (maybe Computer Science Stack Exchange). We ask for a strong relationship to computational science, so usually, the architecture questions we get are in relation to things like how to write code to avoid cache misses, how to take advantage of a particular architecture in a scientific application, and so on. If you'd like, I can migrate the question to Electrical Engineering Stack Exchange. \$\endgroup\$ – Geoff Oxberry Jan 29 '14 at 1:18
  • \$\begingroup\$ @GeoffOxberry yes! if you could move the question for me I'd be very appreciative! Thanks again \$\endgroup\$ – leo vannini Jan 29 '14 at 2:11
  • \$\begingroup\$ It might help to read the question about how many bits the instruction has as what is the minimum number of bits it takes to represent the instruction. \$\endgroup\$ – George White Jan 29 '14 at 2:55

Here are the questions you should be asking to solve this:

For part a)

  • How many instructions does the computer support? 64.
  • How many bits does it take to represent this set of instructions? _
  • How many operands are accepted? 3.
  • What do the operands point to? Registers.
  • How many registers does the system support? 16.
  • How many bits do you need to address a register? _

So once you know these values, simply add up the number of bits required for the instruction ID and the three operands.

For part b)

One operand points to a memory location. How many bits are required to address a 32MB memory space?

For the second operand, I think there's some ambiguity. Is the second operand a constant or is it a register address? I'm betting it's a register address. So how many bits are required to address a register? (see part a)

Good luck!


The program that includes the add instructions in the question must be loaded from memory and decoded in order to run. Therefore, the instruction must be encoded somehow in order to be stored in memory as part of the program. The question is asking you, based on the various described characteristics of the machine and the instruction including number of instructions, number of registers, number of operands, and whether the operands are registers or memory locations, to compute the minimum storage required in order to encode the instruction in the program so that it can be later loaded, decoded, and executed. You should think about what is necessary to represent all of the necessary factors in order to encode the instruction and what that means about how much memory they would take up.


Your Answer

By clicking “Post Your Answer”, you agree to our terms of service, privacy policy and cookie policy