I need some really basic help here. Can I use a 4bit adder chip as a subtracter by using the 2's complement for the number to be subtracted?
In 2's complement, negation can be achieved by inverting a number and adding one (ie -A = ~A + 1). To subtract a number
B, add 1 to it, then proceed to add that sum to
A - B = A + ~B + 1
In order to transform a normal adder IC into a subtractor, you need to invert the second operand (
B) and add 1 (by setting
Cin = 1 ). An Adder subtractor can be achieved by using the following circuitry.
Note that when the control signal
SUB is low,
A = A B = B Cin = 0
Therefore, the computed sum will be
A + B + SUB = A + B.
SUB = 1
A = A B = ~B Cin = 1
Meaning the computed sum will now be
A + ~B + SUB = A + ~B + 1 = A - B, hence achieving subtraction.
Of course you can do it, at a cost of a bit for sign
For a 4 bit chip, you can store unsigned number of 0 to +15 and signed number of -8 to +7 by 2's complement.
For subtraction, you of course need to do signed calculation with the first bit indicating the sign and rest of the bits, the value.
So, 5-2 is actually 5 + (-2) with binary representation of
- 5 => 0101
- -2 => 1110 (First bit being 1 for negative and the rest is the bit flip of 2 plus one by 2's complement. So 2 = 010, -2 = 101+1 = 110)
Adding the above in binary yields 0011 which translates to +3
Another example is 2-3
- 2 => 0010
- -3 => 1101
2 + (-3) = 0010 + 1101 = 1111
To translate 1111 back to base10 you'd subtract 1 and then bit flip the rest so,
1111 => 1110 => 0001
Equals to -1