I have a system that involves two boards and i2c communication between them. One of the boards uses 2.8V for i/o (including i2c) and the other 3.3. The 3.3V board is always the master and the 2.8V is always the slave. It will never be the case that the 2.8V part initiates a transaction. There are two board to board connectors between the boards. The relevant signals passed are +3.3V, sda (either 3.3V or 2.8V), and scl (either 3.3V or 2.8V). The 2.8V board uses an LDO to generate it's 2.8V locally from the 3.3V.

The obvious solution is two fets and 4 pull-ups, but I'm very space constrained. I have room for this on the 3.3V board, but not the 2.8V board (even when using 0402 resistors and a small array package for the two fets). The 3.3V board doesn't have any 2.8V (see above) and I cannot add anymore board to board connectors.

As a result I need to do something else. I thought about doing the "ugly" thing and putting the fets/pull-ups on the 3.3 board and generating the 2.8V with either a biased zener from the 3.3 or dropping the 3.3 over a shotkey. That's not super elegant, but would probably work OK (I don't want to add another LDO to the 3.3V board).

Any other suggestions? Sort of feel like I'm scratching my ear with my toe instead of my finger, but the design is pretty constrained.


2 Answers 2


How about pulling the I2C lines up to 2.8v instead of 3.3v?
The high state threshold level for the 3.3v device is obviously much lower than 2.8v (normally 0.7 * Vcc which would be 2.3v for 3.3v supply) so it should work fine.

  • \$\begingroup\$ That's a good idea and would normally work, but the 3.3V board has two i2c peripherals on it that need to function independently of whether or not the 2.8V board is connected to it. \$\endgroup\$
    – Doov
    Commented Feb 1, 2014 at 0:44
  • \$\begingroup\$ I should have mentioned that in the original post... \$\endgroup\$
    – Doov
    Commented Feb 1, 2014 at 0:45
  • \$\begingroup\$ @Doov That doesn't stop you from pulling the lines high to the same level (2.8v) on the master side instead of the slave side. You'll just need to generate that voltage with the way that suites you. I think it's still simpler than the level translators. \$\endgroup\$
    – alexan_e
    Commented Feb 1, 2014 at 1:39
  • 1
    \$\begingroup\$ That's true. I guess if I'm going to use a zener/schotkey whatever then I might as well just trash the transistors. Good suggestion. \$\endgroup\$
    – Doov
    Commented Feb 1, 2014 at 2:35
  • \$\begingroup\$ Pulling the lines to 2.8 instead of 3.3 can be as simple as adding two carefully calculated pull-down resistor. \$\endgroup\$ Commented Feb 1, 2014 at 8:00

Did you check the slave's specs? It might be 3.3V tolerant.

Does the slave do clock-stretching? If not, and speed is not too high, you could put a resistor divider on the clock.

For the data line you might try a resistor divider + a diode over the top resistor, so the slave can still pull the line low.

  • \$\begingroup\$ Unfortunately the slave device has an absolute max vih of 3.1. The slave doesn't do clock stretching so the resistor divider on the clock would probably work. That might work for sda. I'll look into it. Thanks for the suggestion \$\endgroup\$
    – Doov
    Commented Feb 1, 2014 at 0:47

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