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Apart from the register structure what is the difference between GPIOx_ODR and GPIOx_BSRR?
Is GPIOx_BSRR an abstraction layer for GPIOx_ODR? I know that a change in GPIOx_BSRR "will" change the GPIOx_ODR but how and what are the diferences?

More info:

  • registers description page-162 of STM32F0advanced ARM.pdf
  • MCU STM32F051R8
  • Board STM32F0DISCOVERY
  • compiler arm-none-eabi-gcc -v gcc version 4.8.3
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    \$\begingroup\$ The main point is to avoid read-modify-write operations. \$\endgroup\$ Feb 8, 2014 at 14:09

2 Answers 2

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The BSRR has bitfields that allow you to set and clear bits in a port atomically--without a read-modify-write operation. Instead of reading the ODR value, ORing it with the bits to set, and writing it back, you simply perform a single 32-bit write to the BSRR to set or only the relevant bits.

This often means you don't have to disable interrupts or use other concurrency protections when using the BSRR, and results in smaller and faster code for bit twiddling operations.

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ODR gives you complete control of the output state of the entire port. If you know what all the port's pin's values should be at in any given moment, you can write directly to ODR. This will overwrite the values of each pin, where 1 sets and 0 resets. This may be more desirable than BSRR if you know what the output pin's values should be in memory.

BSRR gives you a method of setting and resetting at the individual pin level without caring what the current values are. It gives you two ranges where you can explicitly set and reset pins as a one-shot operation. Each 1 in the set range will set for that pin, and each 1 in the reset range will reset for that pin (if set and reset are both set for a pin, set takes precedence). This may be more desirable than ODR if you don't need to maintain what the pins should be in memory.

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