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I have a H-Bridge driving a 1200VA 20 kHz transformer. The H-Bridge is rated for 1000W (24V, 42 A). The circuit works very well when VBatt is 14V but the FETs die whenever VBatt is 24V. I found out the reason for this: the capacitor C9 causes a large inrush current (high dI/dt) which in turn causes a large voltage spike on the output of the H-Bridge. The voltage spikes when the circuit is operating at 14V are approximately 38V - the FETs are only rated for 40V and I have already changed these to a 60V part. The spikes at 24V are of course double, ~70V. This is killing my FETs.

If C9 is removed or charged beforehand the circuit experiences no voltage spikes and holds upto 400W load (that is how much I've tested so far) with > 90% efficiency.

My question is, how do deal with the voltage spikes?

  1. The simplest solution seems to be to add a NTC thermistor on the high voltage section - perhaps in series with C9?
  2. Use a FET based inrush current limiter which slowly ramps up the 24V input. However, having the load disconnected at the capacitor will be necessary as otherwise I will need a massive FET.
  3. Use an aux. timing control circuit which, when first powered up, charges C9 through a fixed resistance via a relay and then after some time switches the relay such that the diode bridge is connected directly to C9.

What is the best approach for this sort of power? The circuit is a 24V to 350VDC booster which provides a high voltage rail for an inverter to modulate into a sinusoidal 50 Hz 240V waveform.

enter image description here Larger schematic: http://imgur.com/tZ2CYvZ.jpg

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Dealing with the voltage spikes is more like curing the symptoms than curing the causes. The large inrush current seems to be your problem. Parasitic and stray inductances in your circuit store energy due to this inrush currenent spike and after switching off this stored energy causes the voltage spikes. The inrush current can be reduced by using a soft start mechanism that slowly ramps up the duty cycle on startup or by using current-mode control.

The soft start can be implemented easily with most PWM controllers, but current-mode control is much more reliable as it always limits current, not just during startup. It is also more difficult to implement as it requires a current measurement transformer and a suitable PWM controller.

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  • \$\begingroup\$ Regarding soft-start with PWM controllers... do these PWM controllers use a low duty cycle initially and slowly ramp it up? Will the transformer work OK with low duty cycle and ramp up the voltage as the duty cycle increase? \$\endgroup\$ – Saad Feb 8 '14 at 16:39
  • \$\begingroup\$ Yes, ramping up the duty cycle is the way soft start works. The transformer will work fine at low duty cycles. \$\endgroup\$ – realtime Feb 8 '14 at 17:39
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If you want to clamp a temporary voltage spike, you can use a fast-acting high-wattage Zener. These are called "TVS diodes." In this case, a 27V stand-off rated bidirectional TVS rated for 1.5 kW or 5 kW would probably solve your problem. These are often used to prevent against static electricity damage, so they are made to react quickly. Just note that the stand-off voltage is about 30-40% lower than the "max clamp" voltage, and choose/rate your parts accordingly.

Also, one main cause of ringing during inrush is the LC oscillator created by the inductive load and your parallel capacitors. If you are using high-quality, low-ESR capacitors, this will actually ring more! This is especially bad with ceramic capacitors. If the spikes happen only during turn-on, you might want to look at the effects of C6, too. Perversely, one way of reducing the amplitude of the ringing is to add a small resistance in series with the capacitor -- 1 Ohm might be a good ballpark.

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See EDIT section below for what I now think is happening

Maybe consider a zener diode in series with a normal diode to return excessive energy to the 24 volt positive rail. This would be needed for both halves of the bridge. I'm not sure if 5 watt zeners will be "man enough" because the pulse width is not stated. Longer pulse widths of the rogue transisent means more power dissipated in the zener.

The resistor and relay is a good idea but I might be concerned about heavier loads causing the same problem. An RC snubber in conjunction with the zener might also be a good idea too.

If you have a simulation tool that can adequately demonstrate the problem then I'd consider using it for trialling ideas.

Are you also sure it isn't a core saturation issue at starting up? This can be quite common. Maybe a bit of C9 and saturation?

EDITED from here onwards:-

If you are seeing large spikes on the MOSFETs then, I believe, that is not a problem associated with the load current - the MOSFET's inbuilt diodes should "shunt" excessive voltage back to the power rail V\$_{BATT}\$. Why are they not doing this? "Are the spikes really there" is my first question. Oscilloscopes are notorious at picking up spikes when measuring SMPSUs - the scope ground connection has to be very close to the measurement point or the large currents in the local circuit can induce "false" voltages into the probe/earth wire combination.

If the spikes are really present, then the MOSFET's parasitic diodes should catch them. Obviously you have to check that the parasitic diodes can handle this current. You also have to ensure that really good supply decoupling is present right at the points where V\$_{BATT}\$ meets the FET sources. Ditto on the GND nodes close to the other FETs. Without good decoupling at these points, the trace inductance can allow these spikes to be high enough to destroy the MOSFETs. I don't think you can rely on the 4700uF caps shown in the circuit. These are likely to have significant parasitic inductance due to their physical size.

Here's a picture I drew in case it wasn't clear. At the bottom of the picture is what I believe to be the more likely cause: -

enter image description here

When the switching circuit is running normally you'd expect the primary inductor current to have an average value of zero amps i.e. it might ramp up to 10A and ramp down to -10A BUT, at start-up this is never the case - the current has to begin at zero amps and during the first few cycles it could be the largest current that the MOSFET will ever encounter. This, if not correctly accounted for, WILL cause the core to saturate. Having a large load at power-up doesn't make saturation any worse but it will add to the excessive current seen by the MOSFETs.

What happens when the core saturates? Well, before saturation the current might be rising at (say) 1 amp per microsecond. During and through saturation this "rate" might double or triple and it is this peak excessive current that I believe is killing the MOSFETs.

The core can be prevented from saturating by adding a small air-gap - this might mean more turns to return the primary inductance to the design aim BUT, the net effect (even after adding those turns) is the the magneto-motive force (ampere-turns) will be smaller. Remember inducatcne rises as turns-squared; MMF rises proportional to turns.

Another method is to run the oscillator at a higher speed during start up - this shortens the "charge" time of the primary inductance and the current can be "made" to not reach saturation - this is only needed for a few milli-seconds but is worth considering as an alternative to redesigning the core/turns.

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  • \$\begingroup\$ Can you please explain what do you mean by 'Series Diode'. I will be able to elaborate on the pulse-width by Monday. Could you explain how the pulse-width relates to the Zener size? Also, how can I check if it's a core saturation issue? \$\endgroup\$ – Saad Feb 8 '14 at 15:16
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    \$\begingroup\$ not at pc at moment so will do later dude but ifi forget just leave another comment to remind me. Got to look at circuit on big screen etc.. \$\endgroup\$ – Andy aka Feb 8 '14 at 15:43
  • \$\begingroup\$ Thanks for that very comprehensive answer! It will take me a couple of reads to finally get it but here's a small question: if the spikes disappear after removing the cap (or when it's fully charged), does it imply that this is due to inrush current of the cap? Or will the core ONLY saturate when the something at the secondary demands a high current? Without the cap the waveform is quite smooth with no peaks. \$\endgroup\$ – Saad Feb 8 '14 at 21:53
  • \$\begingroup\$ C9 will be drawing massive thin-ish current peaks due to the rectifiers only supplying current when they conduct and this only happens at the top of each half cycle. I think this might be upsetting your o-scope. Cores will saturate with or without load - I know it's non-intuitive but it's true and it's actually worse on no load (probably a question in its own right)!!! My answer is my gut-feeling - maybe you can disclose the detail of the transformer and primary winding - saturation (if there) can be a simple paper exercise. \$\endgroup\$ – Andy aka Feb 8 '14 at 22:25
  • \$\begingroup\$ Here's the transformer's specs: dl.dropboxusercontent.com/u/76983650/… \$\endgroup\$ – Saad Feb 8 '14 at 22:40

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