Using JK or T flip-flops, it's easy to create a synchronous N-bit counter by cascading them as depicted here:
The above circuit has no feedback loops in it. I have run into a situation where I would prefer to use D flops, but I also want to avoid unnecessary loops because of wiring congestion. My intuition says doing both (using D flops and avoiding feedback loops) is impossible, but I can't really put my finger on why. Both types of flip-flops save 1 bit of state, right? Sticking a feedback loop in on top of the D flop feels like adding another piece of state, but the system as a whole doesn't store any extra data.
Am I thinking about loops incorrectly? What's different about the D flip-flop that makes it not work here? Last and most important, is it actually impossible to make a counter using only D flops and no feedback loops, or am I just too close to the problem to see it?
Edit to clarify my question: Both D and T flip-flops have some kind of internal feedback loop; I understand that. Both D and T flip-flops store one bit of information. What is different about the T flip-flop that allows it to be used in a counter without adding more feedback loops? Or, alternatively, what about the D flip flop makes it inadequate for this purpose when used alone?