I was studying sequential circuits and I am at the very infant stages of the course. After studying the D flipflop I realized that the purpose was to let the data line change the output if clk=1 or keep the data same if clk=0. The circuit that is generally used is derived out of the SR latch which is a complex circuit using two feedbacks. Why cant I use a simple one feedback MUX circuit with the following boolean function?
The circuit diagram at the gate level would be as shown above, where D is the data line and C is the Clock. Am I being dumb somewhere??