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My Schematic

My circuit is the schematic above, I just recently added the push button in the bottom left (P2.3) and my code goes to crap and I'm receiving/sending junk over UART when P2.3 is no where near the UART pins. I'm assuming P2.3 is drawing all the current and causing these issues. However, as you can see I've copied the way TI does the push button P1.3 on the launchpad:

Launchpad Schematic

Here's how initialize Port 2

        P2DIR = 0xFF;
P2DIR &= ~(rf_intrpt + PB);                                                 // Set rx_intrpt as an input
P2OUT = rf_cs + PB;
P2REN |= PB;
P2IFG = 0x00;                                                           // Clear interrupt flags
P2IES |= rf_intrpt + PB;                                                        // Interrupt on high->low transition
P2IE |= rf_intrpt + PB;                                                     // Enable interrupt
P2IFG = 0x00;

What am I missing when correctly implementing this push button?

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    \$\begingroup\$ The "DNP" beside the capacitor on the TI drawing means "Do Not Populate" - they've left a space on the board for a capacitor, but they don't install it. Even if it is installed, the value is 100 nF (0.1 uF), not the 1 uF you show - but I don't think this should cause your problem. \$\endgroup\$ Feb 14, 2014 at 22:51
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    \$\begingroup\$ /begin{rant} I really hate the way the TI engineer drew that switch. I missed it at first, as I looked at the P1.3 net, saw the R, saw the DNP C, but could not find a switch for several seconds until I scanned the whole image. I really really hate the proliferation of disconnected nets like this on modern schematics. It's not necessary and only makes the schematic harder to read. They could have just put the switch right there across the DNP C /end{rant} \$\endgroup\$
    – Brian Onn
    Feb 14, 2014 at 23:51
  • \$\begingroup\$ Are you getting UART junk all the time, or after the button has been pressed, or exactly when the button is being pressed? (BTW, you should remove the cap and debounce in sw. You can also remove the resistor, since you are enabling the internal pullup. Instead, install a series resistor to limit current transients). \$\endgroup\$ Feb 15, 2014 at 0:02

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You're letting a 1uF charge up (via the 47k) then, when you close the switch you are discharging a pulse of several tens of amps when you close the switch - this is not a good idea unless your circuit board layout design is rock-solid and I mean top-notch rock-solid. Get rid of the capacitor or maybe put 100 ohms between the cap and the switch.

Discharging a capacitor this way is really not a good idea and I'm surprised the TI design showed it BUT, their's is only a 1nF cap whilst yours is 1000x times bigger.

I did mean to say that this big pulse of current can corrupt registers and possibly reset the chip.

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  • \$\begingroup\$ Yep the cap. was the problem, didn't see the DNP when I did this. Thanks! \$\endgroup\$ Feb 15, 2014 at 0:49

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