Linked Questions

3
votes
2answers
156 views

putting the decoupling capacitor merely/only near the vcc line [duplicate]

I know I am wrong, this question is just to understand logically why, I am not an engineer but an hobbist While designing a pcb for a mcu I should put a decoupling capacitor near each power lines. We ...
2
votes
1answer
334 views

IC Decoupling caps placement/routing [duplicate]

I've been looking around the web about placement and proper net routing of decoupling capacitors for ICs. In this example I have a pic micro-controller using internal clock at 80MHZ, with the ...
1
vote
0answers
160 views

Decoupling caps near ICs, but how much near? [duplicate]

I always read about decoupling CAPs should be near to MCU pins, but how much near? If we are talking about very small caps of 0201 dimensions, wich distance is good from MCU power pin? Look at this ...
188
votes
17answers
158k views

What is a decoupling capacitor and how do I know if I need one?

What is a decoupling capacitor (or smoothing capacitor as referred to in the link below)? How do I know if I need one and if so, what size and where it needs to go? This question mentions many ...
35
votes
2answers
24k views

What are the advantages of having two ground pours?

I've seen many 2-layer PCBs that have a ground pour on both the top and bottom layers, I was wondering why do that ? and wouldn't it be better to use the top layer for power and signals and the bottom ...
12
votes
5answers
3k views

Forgot to put a via near bypass capacitor, and now the boards have been fab'd - what can I do?

I goofed and didn't notice this until the board was already fab'd and assembled. The board is an RF amplifier; the portion I have pictured is a part of the DC control pat (so no RF is nearby but we're ...
38
votes
2answers
31k views

Competing PCB Crystal layout recommendations

This is related to this question: How's my crystal oscillator layout? I'm trying to layout a 12MHz crystal for a micro controller. I've been reading through several recommendations specifically for ...
20
votes
6answers
28k views

How do I facilitate keeping multiple grounds, (i.e. AGND, DGND, etc…) separated in the layout when using Eagle?

I've designed several PCBs where I needed to keep the ground returns of different parts of the circuit separated, i.e. analog, digital and high power. I use Cadsoft Eagle for schematic capture and ...
24
votes
4answers
14k views

How to place decoupling capacitor in four-layer PCB?

I searched a technology document about placement of decoupling capacitors and the main idea is shown in the following picture: I think it is reasonable but do I have to put the decoupling capacitor ...
11
votes
5answers
6k views

How to connect decoupling capacitor when VCC/GND pins aren't close

I'm making a board which will host an ATmega 162 microcontroller in PDIP package. Unfortunately, VCC and GND pins are diagonally arranged. From what I've read, the capacitors should be as close to the ...
9
votes
4answers
3k views

How important is it to put decoupling caps on the same side of the PCB?

How important is it to have decoupling capacitors on the same side of the PCB as the IC? I am desperately short of space in a design, and it would really help to put the caps on the bottom side. I ...
15
votes
3answers
1k views

Why need the capacitors be as close as possible to the device?

Just a simple question: what exactly stands behind the need for placing the capacitors as close as possible to the current consuming device's pins? Is that the inductance, resistance or maybe ...
6
votes
4answers
2k views

Different decoupling capacitors in parallel

Page 29 of this DAC datasheet gives a typical operating circuit. I notice the power supplies have two decoupling capacitors in parallel: 100nF and 10μF. What caught my eye is that there is a ...
12
votes
1answer
4k views

Characterization of bypass capacitors

I was reading through a few post including Decoupling caps as well as this app note Xilinx Power Distribution Network. I have a question regarding capacitor values within a power distribution system. ...
2
votes
2answers
4k views

Minimization of electrical noise?

I read a textbook and it states that: "The effects of electrical noise can be minimized using circuitry external to the MCU" I don't understand how this scenario works. What does it mean with '...

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