Linked Questions

25
votes
6answers
7k views

What is a flip flop?

There seem to be a number of different definitions of flip-flops and latches out there, some of which are contradictory. The Computer Science text book for the course I teach is probably the most ...
7
votes
5answers
88k views

What is race condition in flip-flops?

I've gone through two of my text books and consulted my teacher but nothing seems to clarify my doubts. The two versions of race which I've been taught are - When the S and R inputs of an SR ...
2
votes
5answers
3k views

Differences between flip-flops and gates

Whatever I searched the web I found things about differences between latches and flip-flops. I'm so new in electronics, my question is what is the difference between gates and flip-flops?
1
vote
3answers
4k views

master slave flipflop and edge triggered flip flop

what is the difference between a master slave flipflop and edge triggered flip flop in terms of circuitry and performance?like the aim they serve i.e. one transition per clockpulse of the final output,...
0
votes
1answer
2k views

SR latch and SR flip flop difference

I read the answer here Difference between latch and flip-flop? which says that the only difference is flip flops need clock and the output of latches don't depend on clock. I am reading Morris Mano ...
0
votes
1answer
673 views

How to simulate a d-flip flop counter/divider?

I would like to simulate a simple one-bit counter (or frequency divider) using the D-flip flop. However, I don't want to use the abstracted D-flip flop above. Rather, I want to simulate this using ...
0
votes
2answers
275 views

RS Flipflop Truthtable for Q=1 and Q* = 0

I am studying Computer Science and I am very confused. Let us say our Q is 1 and our Q* (Negation of Q) is 0. So when we go for R = 1 and S = 0, why isn't the value of Q* = 0? I mean the NOR Gate ...
0
votes
3answers
166 views

What's wrong with my interpretation of what should happen in the circuit and what's happening? [closed]

Here is what I expected to happen: A B C D 0 0 0 0 1 0 0 0 1 1 0 0 1 1 1 0 1 1 1 1 0 0 0 0 ... Initially, suppose all flip flops have output 0. Then, Q' of the ...
0
votes
2answers
85 views

*how* are things triggered on clock rise, fall, high or low, [closed]

I know the purpose and function of triggering logic , such as a d flip flop, on certain clock conditions. However, what I have not been able to understand is actually how these "triggers" work. i was ...
-2
votes
2answers
130 views

Latch jk synchronous [closed]

Is the latch in this image a synchronous J-K latch, and is the truth table correct? Can a latch be considered a memory element that stores a state ? Are these answers good or not? If it is not a pic ...