Linked Questions

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2answers
101 views

Excessive current in this inverter design

I made this inverter with Proteus. The phases have no load at all, but the input current is very high (red arrow.) This happens only when capacitors marked by the green arrows are connected. They ...
1
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1answer
77 views

SMPS Simulation Help

Finally bit the bullet and considered getting help with a simulation I'm looking to get right. Just a heads up, I have limited experience with SMPS simulation in both LTSpice and Multisim. The circuit ...
0
votes
0answers
85 views

H-bridge produces square wave output under heavy inductive load instead of sine wave

I was Following this tutorial to make H-Bridge. I have first did some simulation and the following image shows the same. I don't have schematic because I directly made the circuit by hand based of ...
1
vote
1answer
50 views

Diode-clamped five-level inverter simulation with PSpice

I am working on a diode-clamped five-level inverter simulation with PSpice, but I am unable to get the right results. I have done a simulation with Simulink and I can get the correct result which ...
0
votes
1answer
64 views

Three-phase inverter simulation - incorrect result

while simulating a three-phase inverter circuit with a three-phase load circuit. the simulation result seems incorrect. here is my circuit and simulation result. the input voltage is 300v the output ...
1
vote
0answers
40 views

How to create timing waveforms for an H-Bridge Inverter

This is my first question on Stack Exchange. I am in the process of simulating a wireless charger coil setup on LTSpice. I have tried a Royer/Baxandall oscillator to provide the necessary sinusoidal ...
0
votes
0answers
38 views

Why my gate driver output has spikes?

I am doing a sound amplifier using LTspice and I would like to know if someone know why my gate driver output has spikes only when it is connected to the half-bridge circuit. The INP terminal is ...
0
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0answers
31 views

Issue with H-Bridge simulation waveform

I've built a simple H-bridge circuit with LTSpice: DirSigA (blue), DirSigB (red) and Vout (green) waveforms: DirSig A and B are both pulse signals with a Vmax of 5v. I've been tinkering with the ...
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0answers
23 views

create phase delay between square pulses in psim

i want to create phase delay between square pulses so that the mosfets don't overlap. block C was created to turn on-off the mosfet. however I am not allowed to use the 3 available square pulses as ...
0
votes
0answers
22 views

How can i get a second PMW signal that ranges from -7V to 0V for this H bridge circuit?

This is the circuit i built. The data sheet for U1 and U2: https://www.vishay.com/docs/83666/sfh610a.pdf Currently when i run the circuit and place the curser on the right side of V1 this is the ...

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