Questions tagged [adder]

Digital circuits that adds values

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353 views

Floating point addition. Are guard, round and sticky bit always necessaryl? analysis of a special case

I've a particular case of floating point addition. As you know for given floating point numbers \$x,y\$ one of the steps of the addition involves the fixed point sum: $$ s = 1.m_x + (-1)^{s_x \oplus ...
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137 views

Ling adder vs classic CLA adder what's the difference?

I'm practicing in designing vhdl unit with some "complex" computer arithmetic algorithm. I've just implemented the following CLA unit below. I'm reading through this book, page section 6.3 page 97, I ...
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0answers
1k views

How to compare carry-lookahead and ripple-carry adders?

I am a bit stuck with the concept of carry-lookahead adder so I'd like to compare it with another concept I'm more familiar with: the ripple-carry adder. I'm trying to make some basic math comparison ...
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59 views

How do I draw the truth table of an adder/subtractor that sets flags, and those flags are the inputs of a comparator?

How do I draw a truth table of a circuit that : starts off with a full adder/subtractor outputs the result F based on the two inputs (add if opcode is 0, subtract if opcode is 1) then output three ...
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73 views

2^n - 1 modulo parallel prefix adder

So I have to do a simple 4-bit modulo 2^n -1 parrallel prefix adder. I've actually made a working one, but not modulo. Now I have a trouble with transforming it to modulo one. This looks like this: ...
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2answers
309 views

Integrating an AND gate into another logic gate

I am attempting to make a 4 bit computer with transistors. I've made a half-adder without too much trouble, but now I'm trying to incorporate the AND gate's output (the carry) into the next adder. ...
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26 views

Worst case scenerio in carry skip adder?

I am having trouble understanding this. worst case operation time takes place when carry is generated in the first block carry skips intermediate stages carry is killed in the last ...
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61 views

VHDL - signed vs unsigned adder

I have made a four bit adder with carry-in & -out that contains an unsigned and signed architecture: ...
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36 views

What would happen if a negative voltage is given to an op amp adder circuit?

Would it subtract that voltage because it would reduce the total current going on the feedback resistor ?
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27 views

How to cascade multiple look ahead adders

I know how we can prepare 4 bit look-ahead carry adder (CLAs) to avoid delay involved in rippling of carries in ripple carry adder. We calculate various signal in CLA as follows: Carry propagate ...
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26 views

ripple-borrow binary subtraction circuit

How does this patented ripple-borrow binary subtraction circuit eliminate the need for doing two-complement conversion on the input, thus saves on hardware circuit computation area and time ?
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27 views

Propagation delay in full adder models

From my last question Propgation delay I tried to solve for the time delay that occurs at the last carry Not sure if I have done it right .. Please correct me if I m wrong
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82 views

VHDL - How to add several numbers parallel

i would like to add several (variable number N, fixed size) numbers in VHDL. In the image below you see how i want to do the additions. In this example there are N=6 numbers (A0 - A5). I have a ...
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1answer
70 views

3 bit full adder designing

I am new to the concepts of using adders to add numbers but I tried using the definitions which I understood as given two binary digits A, B the full adder takes three inputs A, B, C where C acts as a ...
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2answers
53 views

Instantiating modules in SystemVerilog

This is a picture of a system that I am building: (original) I am writing SystemVerilog for the Counter4to3 module, whilst the other modules (Full adder and half adder) have already been provided to ...
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1answer
683 views

Implementing a 4-bit ripple carry adder/subtractor using structural VHDL

I have to create a 4-bit ripple carry adder/subtractor. The circuit will have two 4-bit data inputs (A and B), a control line (Add/Sub), a 4-bit data outputs (S) and a carry out bit (Cout). I have ...
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156 views

Designing Excess 5 to BCD using Binary parallel adder

I've been trying to form a combinational logic circuit of converting excess 5 to BCD. I've been able to make a normal logic circuit but I do not know what a binary parallel adder is. My attempt - ...
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1answer
307 views

4-Bit Adder Subtractor Quartus Prime Lite

I designed a 4-bit adder/subtractor circuit in Quartus Prime Lite. I am struggling with getting the correct output on the waveform. It is supposed to take the unsigned decimal numbers and add or ...
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1answer
546 views

About the critical path of ripple adder

I have trouble understanding what's critical path delay of n-bit Ripple Carry Adder. In the book I read, given N-bit Ripple Carry Adder formed from N single 1-bit full adder: the critical path ...
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1answer
400 views

Some questions about Carry-lookahead adder and Ripple-Carry Adder

I was reading about the Carry-lookahead adder and about the Ripple-Carry Adder. I saw some designs and it made me wonder the following questions: Both questions are the same for both adders so i'll ...
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1answer
45 views

Is parallel adder doing additions in each bit position simultaneously?

Does parallel binary adder actually make additions in each position simultaneously? I have read various sources and they all have this description relating to the parallel binary adder: "The additions ...
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1answer
52 views

Alternative for adder out of NAND-gates

Recently I was experimenting with the NAND-gate representation of an adder circuit and tried to implemenent it without crossing wires. So I got this: The carry is negated, but when chaining two of ...
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1answer
718 views

using generate statement in verilog

I am using nested for loops using generate module for creating multiple instances of sub-modules in verilog this is for finding 4x4 determinant. I generated the sub-modules with inputs given ...
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291 views

Latency of Components

Latency comparison between the addition of dependent modules vs independent modules? For example, a 32-bit adder made up of thirty-two 1-bit adders. Each 1-bit adder calculation depends on the ...
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1answer
996 views

Bcd subtractor units connections

I'm new in electronics. I'm trying to make a BCD calculator, but I got stuck in BCD subtraction. I got stuck in: how can I connect multiple bcd subtrator units? I'm trying to make a 3 digit calculator,...
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1answer
261 views

creating a circuit using half/full adder

My brother got this at school I cant help him with, I am thankfull for any help/advices On a street there are 2 traffic lights - one for people and one for cars. Both traffic lights have a button ...
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1answer
50 views

Designing a Carry lookahead unit using EEPROMs, creates osclillator

I have read something about CLUs (Carry lookahead units) and want to build one. I have settled on design using eeproms as adders ...
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1answer
717 views

Logisim Adder Circuit

I was trying to add 0xA5 and 0x44 by using adder circuit and connect Hex Digit Display to show. however, the Hex Digit Display doesn't show me anything and the result also not right. i would ...
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1answer
2k views

Trouble with 8-bit Carry Lookahead Adder in Verilog

I'm new to Verilog programming. I'm trying to work up to a 64-bit CLA by building a 4-bit CLA, then an 8-bit (out of 2 instances of a 4-bit), then a 16-bit (out of 2 instances of the 8-bit one). I'll ...
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2answers
8k views

4-bit Full Adder using Two 2-bit Full Adders

I have the modules for a 1-bit full adder and 2-bit full adder (built upon the 1-bit adder). May I know how I could go about writing the subsequent 4-bit adder based on the 2-bit adder? This may be a ...