Questions tagged [addressing]
The addressing tag has no usage guidance.
143
questions
0
votes
1
answer
42
views
How to do a high input count similar to addressable LEDs
I'm trying to find an IC or something similar with a high input count that can compare sensors in a simple matrix and trigger an output.
Matrix would be:
...
- 2,542
0
votes
1
answer
103
views
Short address DALI-2
I'm trying to write a complete algorithm for assigning short addresses to input devices on a DALI bus. At the start I don't know how many input devices are installed on a DALI bus.
The procedure in ...
- 14.7k
0
votes
1
answer
608
views
What is slave select signal on the APB bus for?
I am currently working on an APB BFM and I have a question regarding the bus protocol. I understand every slave on APB bus has its own unique address space, where its internal registers are mapped. ...
CommunityBot
- 1
0
votes
0
answers
31
views
Connecting higher density LPDDR3 SDRAM than the ATSAMA5D27C processor supports
I'm designing a Single Board Computer for the first time. The board will have ATSAMA5D27C as its MPU with LPDDR3 SDRAM. The datasheet specifies that the maximum SDRAM it can support is of 4Gb (512 ...
1
vote
0
answers
149
views
Understanding the 20-Bit Addressing in 8086 Memory Architecture: Why Not 18 Bits for Base and 16 Bits for Offset?
I'm curious about the memory addressing in the 8086 microprocessor. Given that there are four segments and 16 bits for the offset address, the total address space is 20 bits. I'm wondering why there's ...
9
votes
2
answers
594
views
What is the theoretical maximum capacity of 72-pin RAM modules?
I'm asking, because the information on Wikipedia is extremely lackluster, perhaps even incorrect.
This is my current understanding:
A 72-pin module has 12 address pins, 4 CAS, and 4 RAS pins. (For ...
0
votes
0
answers
18
views
Rising Edge Demux
I'm trying to create a demux for the YM2610 sound chip.
The sound chip selects whether to set the low bits or high bits of the address with a single pulse; the rising edge should trigger a latch for ...
- 1
3
votes
1
answer
78
views
Memory Capacity and Memory Addresses
According to this site, in Table2, HBM(HBM2e) has a capacity of 8Gb = 2^33 bits per channel. Here, it has a 24-bit address consisting of 4 bits from the Bank address BA[3:0], 15 bits from the Row ...
- 77.5k
3
votes
1
answer
267
views
Do there exist I2C address-remapping "NAT" chips?
For I2C devices that do not support address changes, do there exist "I2C address proxies" that can sit in front of the statically-addressed device and proxy a different address to the chip ...
- 1,097
2
votes
0
answers
68
views
Does I3C addressing assign stable addresses based on physical displacement?
I'm potentially looking at making a modular keyboard, where I have a single unit for each key (a la these atoms someone else used for experimenting), and I became curious about what would happen with ...
- 3,295
0
votes
1
answer
135
views
What's the *actual* meaning behind the I²C reserved addresses?
I'm building a i2c-tiny-usb compatible adapter, and am trying to implement a "transparent side channel" for advanced configuration/features of the adapter....
4
votes
1
answer
997
views
Where do 1-wire device (such as DS18B20) manufacturers obtain their addresses?
We know that 1-wire devices, such as the DS18B20 temperature, sensor have 1 64 bit address, of which 8 bits is 0x28 and another 8 bits is the CRC. We know that the address is burned into the chip at ...
- 3,943
0
votes
2
answers
122
views
I2C Addresses - How to check
I want to use these two devices - 24AA512 and MCP79410M. The EEPROM part has external A0, A1 & A2 for address. But the other part does not have external address pins. In this case, how to ...
- 148k
0
votes
1
answer
71
views
How to debug modbus rtu address space problems? [closed]
I have an "Ewon Flexy server" and an "IMO SD1 Inverter" connected via Modbus RTU RS485.
I can change some of the parameters with Flexy interface and observe the change in the ...
- 188
3
votes
5
answers
8k
views
i2c automatic address assignment
History:
I decided to design a circuit with some peripheral ic's. Although SPI may achieve great data rates, because of its master-slave architecture and separate chip select pin requirement, I ...
- 8,317
1
vote
1
answer
366
views
How can I recreate a circuit like the WS2812 addressable RGB LEDs without the actual strip?
I've tried googling, youtube, even chatgpt but I'm not quite finding what I need.
Can you point me in the right direction for how to create a custom circuit similar to an addressable RGB LED, where I ...
- 14k
0
votes
0
answers
180
views
Addressable RGB lights on a battery
I'm working on a DIY project making an RGB tube light or wand. My concern is how I can run an addressable RGB strip on batteries.
Things I have;
A one metre strip with 144 pixels on it that needs 5V ...
- 71.4k
1
vote
1
answer
854
views
How start running STM32 firmware from IROM2 in Keil Microvision?
I'm developing an embedded application using Keil MicroVision 4 & STM32F103RE
I've splited Flash memory of device into two areas (IROM1 & IROM2) using IDE target options panel (Target tab, ...
- 11
1
vote
4
answers
2k
views
Reading from a slave on the I2C bus: Why is the slave address provided twice?
I am new to I2C and learning more about it from this TI document.
In the above image you can see that the slave address is provided twice. Why is that?
- 441
7
votes
3
answers
2k
views
How are BAR registers handled between end points in PCI Express?
I have a question related to the PCI Express protocol.
I managed to understand most of the features of the PCI Express protocol but could not entirely understand the enumeration process.
I know the ...
- 40.9k
3
votes
1
answer
197
views
Connecting I2C sensors with the same address over 16-20 metres in a daisy-chain with 1 cable
I'm trying to solve the following problem:
"How to connect 3 to 8 I2C sensors with the same address over 16-20 metres in a daisy-chain with 1 cable without having to deal with address clashes or ...
- 13.2k
1
vote
4
answers
1k
views
Why can't you use microprocessor I/O pins as chip enable pins for ROM and RAM?
I have been reading a textbook on embedded systems called An Embedded Software Primer by David E. Simon (great book, by the way.) I am trying to answer the questions after each chapter. I got through ...
- 71.4k
0
votes
0
answers
282
views
Computer architecture: Count of RAM, ROM and I/O interface addressing
I am trying to work through this question and I appreciate any help or hint. Thank you
Problem:
A computer system uses RAM chips of size 512x8 and ROM chips of size 256x8. The computer system needs 4k ...
- 9,205
2
votes
1
answer
930
views
How do you fit so many instructions on a 8-bit processor?
I will preface this that it is highly likely that I have misunderstood how Harvard architecture works, but I cannot understand how an 8-bit instruction set, say the ATmega128 for example, can contain ...
- 148k
4
votes
3
answers
3k
views
I2C EEPROM with non-standard address? [duplicate]
So I know that almost all I2C EEPROM ICs use 0xAh (or 1010) as the top four bits of the slave address. I currently have a 16 kbit EEPROM on my I2C bus that uses the lower 3 bits of the slave address ...
Null♦
- 7,603
3
votes
1
answer
250
views
How do I2C modules select between more than 2 slave addresses?
I am using the TMP112 I2C temperature sensor and noticed that you can choose between 4 slave addresses by connecting the A0 pin to V+, GND, SCL, or SDA.
How does the sensor tell between SCL, SDA, and ...
Null♦
- 7,603
2
votes
2
answers
8k
views
modbus register address vs. register number; absolute address vs. offset
I'm developing a Modbus Server device, and I'm having a little trouble understanding how to name or address my registers.
Let's say I have 2 Discrete Inputs and 2 Input registers. From Modicon ...
- 149
4
votes
0
answers
107
views
Can I use LPDDR3 memory that is larger than my processor supports?
I am working on a thing that uses a STM32MP157C. Its datasheet says:
The STM32MP157C/F devices embed a controller for external SDRAM which support the following devices
• LPDDR2 or LPDDR3, 16- or 32-...
- 141
0
votes
1
answer
37
views
what's thsi register Address: "16’b11_0_1_0nnn_0001_0011" stands for?
I'm learning a "PHY full rate clock divider configuration register" and it represents its register Address as 16’b11_0_1_0nnn_0001_0011
I think 16 stands for bit number, ...
- 19.2k
0
votes
1
answer
383
views
KSZ8081 PHY address configuration
I'm using this KSZ8081 PHY transceiver.
I'm unable to understand how to configure the PHYAD[0:2] pin and the B-CAST_OFF pin.
As far as I read, the PHY Broadcast address will always be "0" ...
- 148k
0
votes
1
answer
66
views
Alternate of the parallel flash
Hi I am looking for an alternate of the flash S29AL016J70BFI010, its a top boot sector device.
unfortunately I have not found any 16Mb flash with top boot sectors.
Although I am able to find 32Mb or ...
- 3,593
1
vote
2
answers
2k
views
PCIe End-Point configuration for communication with Root Complex
I have an ambiguity regarding the PCIe initial configuration which is performed by the root complex (RC) on the end-points (EP).
Both devices have their own base address registers (BARs). The RC ...
- 12.6k
-6
votes
2
answers
724
views
Memory Addressing Question
How many address lines and how many data lines are
required for a 128KB memory with 16-bit word when
the memory is:
• Byte addressable
• Word addressable
0
votes
1
answer
327
views
How is a read of SDRAM done?
A SDRAM module is divided into chips. And those chips into banks. Banks can have different row and column lengths.
When reading a given address, I feed the address to the memory specifying the address ...
- 9,205
0
votes
0
answers
103
views
What is the difference between Content Memory Addressing (CMA) and Content Addressable Memory (CAM)?
I have been looking over the internet for Content Memory Addressing(CMA) but whenever I search for it I get Content Addressable Memory (CAM). So I am confused, is CMA and CAM the same thing. If ...
- 101
8
votes
3
answers
2k
views
Why are the SRAM data and address pins numbered? [duplicate]
As far as understand, it would make no difference to the operation of an SRAM if you mixed up the order of the address or data pins.
E.g. http://www.farnell.com/datasheets/1911297.pdf?_ga=2.220805788....
- 457k
0
votes
2
answers
182
views
inverting address decoder with low after high
I have an 74137 address decoder and know how to build one like that from basic gates. But in my use case the address decoder is connected to the enable pins of a number of bus drivers and I fear this ...
- 54.1k
0
votes
1
answer
145
views
What is the difference between Register Addressing mode and Direct Addressing mode(8051)?
I find that there is no difference between the Register Addressing mode and the Direct Addressing mode.
Can anyone tell the difference with respect to the 8051 microcontroller ?
- 3,831
0
votes
0
answers
499
views
Offset of bnez in RISC-V program
I came across a question about assembly that I was confused on.
We are given the following table for addresses and instructions:
The question says: replace the labels of PC-relative targets with ...
- 9
2
votes
2
answers
26k
views
Determining physical address for logical address
I have a simple segmentation system with the following segment table:
...
1
vote
3
answers
3k
views
Physical address vs virtual address
Physical address is hardware address of physical memory and virtual address is the one the processor will be seeing, it has it has a tag and offset. I understand this. Can any one describe it with an ...
1
vote
1
answer
2k
views
Addressing scheme with CAN bus
I'm going through some addressing schemes with CAN bus. I came across this post: Most efficient way to handle addressing / termination in a daisy-chained CAN bus?
There's a solution explained called ...
- 56.7k
1
vote
1
answer
1k
views
Memory IC width vs depth
Given a need for a single 2G × 32 bit DDR3 memory block, which configuration would be ideal and why? What are the pros and cons of each approach?
A: Two 2G × 16 bit memory ICs
or
B: Two 1G × 32 bit ...
CommunityBot
- 1
1
vote
2
answers
329
views
what is modulo addressing?
What exactly is modulo addressing? I think here is a useful source but I can't understand what it is exactly about. From my understanding it implements a circular buffer.
Is it that? Why is that so ...
0
votes
1
answer
248
views
Specifying the address range of each memory block
Four 16x4bit blocks are interconnected to form a 64-bit memory as shown below
First of all why is a block here called 16x4bit ; 4 bits are related to the input gates but what's with 16 here ?
I also ...
- 227
2
votes
1
answer
1k
views
Dali commissioning Luminaires
I have more than one lamp and i need to make a program to commissioning.
I've already did it whit a single lamp but now I don't know :
How to make addresses for multiple lamps (in my case A3 is ...
- 8,420
3
votes
1
answer
1k
views
DALI : How commissioning process takes place in DALI system -2?
Broadcast control commands are working properly. But, I am not able to get the response from Dali Driver, for broadcast query or special commands.
And also I am not able to set short address for the ...
- 155
0
votes
1
answer
61
views
Address decoder design and memory tables (recommended books)
i have been self studying and i encountered with an exercise of address decoder design, i have seen videos and i have searched in this book "Digital design by M. Morris" which is the one im using for ...
- 77.9k
0
votes
1
answer
157
views
Dynamically setting address of HT12E with Raspberry Pi
I have a project where I need to send a wireless signal to one of several receivers to turn on an LED.
One transmitter, several (many) receivers, each with an LED.
The receivers need to have low ...
- 101
1
vote
1
answer
326
views
How to read this memory map of LPC1769 microcontroller?
I'm trying to understand the memory map of the LPC1769 microcontroller using the official NXP datasheet. The screenshot below shows at 0x00004000 to 0x00008000 there is 512kB of flash memory mapped, ...
- 16k