Questions tagged [ahb]

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What are the primary differences between AHB, APB and AXI?

As far as I am aware, the AMBA specification has multiple versions and describe different buses which include the AHB, APB and AXI. My questions are: Are the different specifications of AXI backwards ...
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1answer
51 views

Why is data delayed by 1 clk cycle in AHB write transfer?

Here is image showing a basic write transfer: The HWDATA comes 1 clk cycle after the control signals and the address. Why is this so? What will happen if the HWDATA is put on the bus at the same time ...
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256 views

Data during AHB Busy state

I have a question regarding the data during the BUSY state in a AHB bus. Consider the following example of an AHB master writing data onto an AHB slave: ...
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1answer
123 views

How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data?

How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data? Are instruction fetches done always using NONSEQ? How does it fetch data from memory(using burst or NONSEQ ...
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144 views

Is it legal to design an open source AHB master?

Is it legal for open source cores to be compatible with the AMBA specification?
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558 views

STM32F4 bugs in DMA, is there bug-free version?

Producer has confirmed that if there will be concurrent AHB and APB2 transfers using DMA2, then data corruption will occur (source). The bug discovery is from 2012, many years ago. Is the STM32F4 ...