Questions tagged [allegro]

Allegro is PCB design software by Cadence.

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29 views

How can I add reference return path via (ground via) in a symmetric way in PCB Editor?

I would like to add symmetric via (return path via in the middle) using PCB Editor as shown below. I can add via manually. I just wanted to make sure it is symmetric to the two diff-pair fanouts as ...
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1answer
142 views

What is no-probe-top in Cadence OrCAD

There is a rectangle around the outside of my OrCAD footprint (pointed to with the blue arrow), and it is on the no-probe-top layer. I googled it but I couldn't find any explanation of what that layer ...
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36 views

How to achieve clearance for the mechanical pin and vias from ground plane in PCB Editor?

I am a beginner, trying to learn the PCB Editor myself. I have to assign layer-2 as ground plane. I managed to assign layer-2 as GND as planned. But, now my mechanical pin and other high speed signals ...
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67 views

Current / power measurement using ACS71020

I am having some hard time in understanding and comprehending the value for ACS71020 current and power measurement. In the manual, rms_avg_1 and rms_avg_2 has been mentioned stating that "The ...
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42 views

Allegro ACS71020 Reinforced Isolation

Based on the diagram on the datasheet, I don't see that the AC line voltage measurement circuit is reinforced isolation. Resistor dividers can't be reinforced isolation circuits as my understanding. ...
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0answers
51 views

How to rename the layer name in PCB Editor?

How can I can edit or change the following layer name? I am a self learner of PCB editor. I was trying to design the copy of a file I already have (A reference board file). The below picture is the ...
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1answer
127 views

Reading registers from ACS71020 over SPI

I'm trying to read registers from current-sensing chip ACS71020 connected over SPI. This is how I initialize the SPI: ...
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2answers
117 views

OrCAD Schematic cleaner option

I am using 16.6V Allegro.Is there any option on OrCAD Capture CIS for beautifying Schematic? For example, say, I have entered a schematic with irregular wires and used long wires. Is there any ...
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1answer
182 views

How to draw/include ESD susceptibility symbol on my designs?

I am using Allegro 16.6V. I want to draw/include ESD susceptibility, non-recyclable and recyclable symbols on my design. How can I do this?
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1answer
398 views

OrCAD: Uniqueness/Scope of Net Aliases, Busses, and Net Groups, Hierarchical Ports, and Off-page Connectors

I am using Allegro/OrCAD Capture. I need some confirmation about the scope of some various types of nets in Allegro/OrCAD Capture, particularly with regards to hierarchical design and projects with ...
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0answers
39 views

Making Daughterboard Symbol and Footprint With Multiple B2B connectors

I am using Allegro/OrCAD. Suppose I have a PCB module like the one below, which contains multiple B2B connectors and is meant to mount to be plugged into a larger PCB: Each B2B connector has its own ...
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1answer
85 views

Allegro padstack not showing my pads

I have implemented a schematic for an IC (BGM13S32F512GA-V2R) and I am trying to create a footprint but when I try to place the padstacks, they do not appear in the default library... so I went into ...
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3answers
74 views

Arranging multiple board files in single board file

I am going for PCB array manufacturing in order to save some costs. I have totally designed 3 different board files and I want to combine each of them side by side. Can somebody tell me the steps in ...
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1answer
702 views

Dynamic phase Routing In Allegro

My doubt is regarding the dynamic phase control while routing differential pairs in allegro. If anyone knows kindly clear my doubts on these questions. For your reference, I have attached a snapshot ...
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1answer
301 views

Allegro OrCAD Capture: Crashing after DRC check [closed]

Issue: The OrCAD Capture software by Cadence is continually crashing. The version I have is SPB_16.5. Problem: I can run ONE DRC check fine, however; when I run another DRC on my schematic, the ...
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1answer
724 views

OrCAD PCB Designer File Export to PDF (Gerber)

i want to export this PCB circuit to PDF exacty as it is (above image), but when i click on file -> export -> PDF, its shows exacty the window on the left "Allegro PDF Publisher", then i click on film ...
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1answer
115 views

IC Pins with adjacent same net need to be made as common shape?

Attached is the layout I am working on. Please see the yellow circled area. It is a common net. I have kept it as separate trace in the layout for each pin. Is there any advantage by providing shape ...
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1answer
197 views

Difference between MOSFETs

I'm working on a 3 phase brushless, sensorless driver (Allegro A4960.) I need to drive different motors in terms of power. The voltage is 24V but the current per phase varies from 1A to 6A, so I'm ...
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1answer
378 views

A4963 3 Phase Brushless Sensorless

I have to develop a driver for a 3 phase brushless DC motor @ 24V with max current per phase of 5A. I want to use an Arduino Zero for testing. My idea is to use the Allegro A4963 IC. This is my first ...
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1answer
1k views

how to remove this error “ERROR 152: Port on instance does not exist in entity declaration for instance”?

I am new to Cadence Allegro HDL for schematic design and for my first design i got this error. In 728 page document provided by cadence its is mention as follows, "Open the symbol for the component in ...
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1answer
976 views

Allegro PCB design: How to set referenced center during Footprint making

I have designed the Pads from Orcad Pad designer. Now I would like to make footprint of my IC but to design that i need a reference center point so that i can decide location of pins. Please tell if ...
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2answers
584 views

Hot swappable stepper motor

We got a bulk of stepper motors, you can see specs on the following image: I'm doing some work on my school laboratory, and they want me to test this motors to see which ones work and which ones ...
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1answer
465 views

EAGLE for 10 layer boards with 337-ball BGA?

I have been using EAGLE for some years. The boards I have designed had the following specs: up to 4 layers 6mil spacing densest package: QFN, 0.4mm pitch only "ordinary" vias mainly (low frequency) ...
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1answer
926 views

How to carry out signal integrity simulation with IBIS models

I need to determine if there will be high speed effects on the clock signal. I have not done such a simulation before. I have the IBIS models of the circuit components involved. I think I still need ...
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2answers
842 views

Is it possible to edit gerber file using allegro?

I want make some corrections in gerber file. Is it possible using allegro? Or is any other better method to do it?
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2answers
4k views

How to fix line to line spacing error in Allegro?

I have a line to line spacing error in Allegro. I don't know how to fix it. If I make the width of the trace smaller, it gives me a line to width error. And I also don't understand Why I get this ...
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1answer
194 views

Problem with circuit cam, can't view my top layer?

I have a circuit laid out in allegro and I'll be milling it out on a board router. I'm using Circuit Cam to produce the files needed for the board router. I have three layers, a top layer, a bottom ...
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1answer
1k views

Allegro: How do I view the identifiers of all my components?

I'm using Allegro PCB editor to layout a board for a circuit that I'll be cutting out on a board router. In allegro PCB editor I just imported the netlist and I used quickplace to automatically place ...
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1answer
961 views

Pad with 4 pins in allegro cadence (orcad)

Sorry for silly question, but how to draw pad with four pins? It's not just a custom shape of pad, it has 4 pins. Thanks
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2answers
2k views

Pin numbering in OrCAD?

I'm getting another error in OrCAD when I try to create the netlist. When I try to create the netlist I get this warning: ERROR(ORCAP-36022): Pin number missing from Pin "DRIVE" of Package ...
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3answers
4k views

How to fix my warning in OrCAD?

I'm doing a schematic on OrCAD and when I did the Design Rules Check I got a warning that says: Checking Electrical Rules WARNING(ORCAP-1608): Net has no driving source N30274 I have a fairly ...
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3answers
7k views

How do I overlap wires in OrCAD capture without having the two wires have a node?

I'm doing a schematic for this in OrCAD capture CIS. In laying out my schematic I need to draw one wire going through another wire, but not necessarily intersecting with it via a node. When I drag a ...
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2answers
9k views

How to convert files from Cadence to Eagle CAD?

Is there any free software that can convert Cadence files (.dsn, .opj, .brd) into Eagle CAD files (.brd, .sch)?
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2answers
7k views

Where is Cadence's Allegro Design Entry HDL 16.5 Snap o Grid Option?

I am looking for the snap to grid option? Any idea how to enable it? I did try looking on Cadence forums and documentations, but I did not find anything. Also any idea how I can move wires/...
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1answer
4k views

H-bridge output filtering

I'm driving A4952 motor driver with about 25khz PWM signal, with a simple coil connected as a load between OUT1 and OUT2. VBB is variable, testing with 15V but changing it doesn't alter the results. ...
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1answer
1k views

Programmatically generate padstacks for Cadence Allegro

I am laying out a complex board, with many components. One of the steps is to create padstacks for the footprints of each component. It turns out I have (nearly only) two types of padstacks to ...
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1answer
2k views

PCB footprint of Xilinx Kintex 7 FPGA [closed]

I am laying out a board with a Xilinx Kintex 7 FPGA (serial number XC7K70TFBG676). The first step is to create a footprint of the FPGA for my layout tool, the Cadence Allegro PCB Editor. Does Xilinx ...
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2answers
73 views

Why does the data sheet for A1362 have conflicting procedure to program sensitivity?

This data sheet shows two different ways to program the sensitivity of the A1362 on pg. 18 2nd paragraph under "Hold Mode" says "Powering the VCC supply automatically causes the device to enter the ...
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2answers
1k views

First time PCB layout recommendations [closed]

I have been assigned the task of laying out an A4-sized 10-layer PCB board using Allegro. Someone else is doing the schematics, which I will receive soon (all I know now is that the board contains an ...
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1answer
274 views

What is the proper way to set the offset and sensitivity parameters for Allegro A1362 so MSP430 properly digitizes them?

What is the proper way to set the offset and sensitivity parameters for Allegro A1362 Programmable Linear Hall Effect Sensor so that TI MSP430 5528 properly digitizes them? Using observed values of ...
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3answers
8k views

Library of footprints for Cadence Allegro / PCB Editor [closed]

I keep having to design my own footprints for Cadence Allegro / PCB Editor even for standard parts. There are lots of libraries for schematic capture symbols but I am having trouble finding footprints....
4
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1answer
358 views

Allegro: plotted artwork only has hatched pads

I am trying to find my way around Cadence Allegro. My aim is to make a PDF file with the copper mask. I made a schematic with capture, created a PCB layout with Allegro PCB Designer and created ...