Questions tagged [alu]

ALU is the acronym for arithmetic and logic unit. This circuit performs arithmetic and logic operations in a processor.

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For a mathematical operation in CPU, could power consumption depend on the operands?

Obviously, the number of operations affect a CPU's power consumption, but does it solely depend on the operations themselves? For example, adding 0 and 1 involves setting one single bit, but adding ...
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How can I make a 7-segment display driver immune to intermediary states using basic logic gates (where each gate has a 1hz refresh rate)?

How can I make a hexadecimal 7-segment display driver immune to intermediary states using basic logic gates (where each gate has a 1hz refresh rate)? The problem I'm running into is that on the first ...
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Is it usual design that the addition operation in the arithmetic-logic unit is performed by default as other instructions are executed?

The book But How Do It Know? presents an 8-bit computer architecture in which arithmetic-logic instructions (that is, instructions which are executed by the ALU) have 1 as the most significant bit, ...
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ALU 74181 Cn+4 output

I am a mathematician, so please forgive my wrong terminology :) I am currently trying to build an 74181 ALU and went over the schematics. On Wikipedia it is given as: https://en.wikipedia.org/wiki/...
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2 votes
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Why can't an Asynchronous CPU use a simple "completion bit" to signal completion?

I've been reading about how asynchronous CPUs work, but they always seem to involve some complicated way of communication. Wikipedia talks about a two-way and four-way handshake. I found a pdf from ...
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Logisim: Implementing a control unit for "Addition", "Logic bitwise AND" and "right logic shift" in ALU [closed]

I'm very new to circuit design. I've built an ALU and now I only need a control unit for three operations, "Addition", "Logic bitwise AND" and "right logic shift". What ...
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In a CPU, how are LU inputs/outputs controlled and fed back to registers?

Basic problem: CPU instruction chooses which register to feed into a LU (such as an ALU), which then outputs a number somewhere and fed back into a register. But sometimes you want to feed the answer ...
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Checking Bitstring for = 0, then set a zero Bit = 1 in ALU

I am trying to model an ALU to implement a shift operation. When the shift operation is done, I should check the result for = 0. If a result = 0 was found, I want to set a single result bit = 1. I was ...
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How are irrational numbers best represented and processed by computers?

My question is closely related to this one: How do computers understand decimal numbers? However, that question deals with rational numbers only. I was wondering if irrational numbers can be ...
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Role of ALU in executing MOV instruction

1.What is the role of ALU in executing instructions such as MOV, SET bit, Reset bit which doesn't require any computational feature of ALU? 2.Arithmetic part of ALU makes use of logic gate combination ...
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Designing subtractor using adder in Logisim for 1-bit ALU. How to implement Multiplier in my 1-bit ALU?

How can I design subtractor using adder in Logisim for 1-bit ALU (Arithmetic Logic Unit)? And also, how can I implement Multiplier in my 1-bit ALU? Here I tried to make 1-bit ALU which will perform ...
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I don't know what to write on the testbench of a VHDL code

I have written a VHDL code for a 5-bit input, 32-bit ALU with a 6-bit opcode. The problem is that I don't know what values to put on the testbench section in order to see if the code is correct from ...
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VHDL code for ALU and ROM connection

I need to connect an ALU with a two-port data memory, but I can only implement this far, and I don't know what is missing, plus I am a bit confused as to what to write for the testbench code ...
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Parallel execution in a single ALU

I read that in theory, it is possible to use the circuits in an ALU in parallel. Now I am wondering whether there is any way to leverage this in practice on commodity CPUs? Specifically, I want to ...
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How to compare two operands that are more than 4 bits using a 74181 ALU?

I have this 74181 ALU in Proteus. I want to compare two operands that are 8 bits. How should I change my circuit?
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1 vote
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ALU result is 0, how to fix this?

In system-verilog I am trying to build a small ALU unit which takes a and calculates the negative value of it (-1) in a CPU. I wrote: ...
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Would this type of design be scale-able? [closed]

With current technologies within a modern system, we have pushed the limits of computations within the CPU portion of the system where it now exceeds that of the memory units. Moving memory is slow ...
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2 votes
2 answers
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Connecting potentiometer to an FPGA simply

I have a question about connecting a potentiometer to a FPGA. I am connecting a potentiometer to an external 8 bit ADC chip that is outside the FPGA. I want the pot to represent a speed setpoint ...
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Can two x-bit ALUs/FPUs be combined to create an equivalent a single 2x-bit ALU/FPU?

I was wondering, can 2 16-bit ALUs/FPUs be combined to create a 32-bit ALUs/FPUs, or are 4 ALUs/FPUs required? I was wondering if lower precision ALUs/FPUs can be combined in any way to create a ...
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Are FPUs made of ALUs, and how many ALUs are needed to make up an FPU?

In GPUs/CPUs, are FPUs made up of ALUs? If not, what would be a smaller "logical unit" that FPUs are made up of? If FPUs are made up of ALUs, how many ALUs would it take to make up a 16-bit ...
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Sum of two 4-bit and a 5-bit number with 74181 ALU any advice?

I was designing a medium logic circuit and when trying to figure out this equation with 74181 ALU, I couldn't really find anything about how to make this work with a 4 bit ALU. equation F= 2A + B ...
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Can I implement addition and subtraction in different operations using a MUX?

I'm building a 16-bit ALU that needs to be able to perform logical AND, OR, add, subtract and rotate one bit to the left. I need to have addition and subtraction operate with different op codes ...
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How do I implement a rotate left 1 bit operation in a 16-bit ALU in logisim

I'm creating a 16-bit ALU that has to perform logical AND, logical OR, addition, subtraction and rotate left one bit. I have everything working perfectly except the rotate left one bit. I think I need ...
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Simulating RV32I ALU + load/store instructions using verilog

I'm writing a Verilog code to simulate RISC-V RV32I ALU and Load/Store instructions in Verilog. It contains of 5 parts: regfile.v- which contains the 32*32 registers required for RV32I, decoder.v- ...
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3 votes
1 answer
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What parts/sections of a CPU take the biggest number of transistors?

I was surprised to hear CPUs only have a number of ALUs. What are most of the transistors in a CPU dedicated to?
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-2 votes
1 answer
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Not getting correct results displayed from register

I am trying to input the numbers 1,0,3,2,32'hFFFFFFFF,32'h00000001 into the registers 0,1,2,3,6, and 7 respectively. I am doing this through always @(posedge clk) ...
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1 answer
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How to instantiate module with variables

I declared alu_result as a reg because I need it to be a variable data type for my case statement. But when i do this, I cannot pass it my ...
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1 answer
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Logical Effort in complex circuit - Output capacitance

As part of a VLSI course I was asked to estimate the delay of an ALU, similar to the one described in the picture, using Logical Effort method. I calculated the delay of the critical path through the ...
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2 votes
1 answer
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How does a processor negate an integer?

I am aware of three ways to negate an integer using 2's complement representation. The standard "invert, then add 1" which is taught in most textbooks. Scan from the least significant bit, ...
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Are there consumer ALUs in the GHz range?

When browsing consumer ICs, I struggle to see parts that function faster than a few hundred MHz, let alone in the GHz range. (Mostly the chips I want are ALUs or something similar.) Obviously ...
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Do ALUs perform all/most N operations before running through the multiplexer?

I'm doing some self-study on hardware and currently implementing an ALU. The way I'm designing it is such that I have an N:1 MUX (N inputs yield a single output (16 bit number) based on selector bits)....
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Syntax error near "else" in Verilog, in an initial block, next to assert

I'm trying to make a self-checking testbench for an ALU I'm designing for an extra credit assignment. Here's what I have: ...
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1 vote
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How do I implement a Barrel Shifter?

I'm using Multimedia logic for this particular assignment, I am to implement an ALU that performs Bitwise Rotation on the input from "A" by the amount defined by "B". Not quite sure how to approach ...
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Is a 14((n^2)÷2) gate n-bit integer divider reasonable?

I figured a way to implement a fast divider (basically a ripple-carry divider) with deterministic delay, but it's stupidly-large, essentially requiring two AND gates (multiplier and a position test to ...
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1 vote
1 answer
571 views

I have a problem with understanding the attached ALU (6 control bits)

I have an Arithmetic Logic Unit, as shown below (I also included a CircuitJS simulation of it, so it will be much easier to understand the inner working of said ALU). ‘x’ and ‘y’ are the 4-bit input ...
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2 answers
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Buses and the ALU in the 8086

Intel's 8086 manual shows the following diagram for the CPU's architecture (in page 2-5): If I understand correctly, the ALU's two operands and result are retrieved from / sent to the same 16-bit bus....
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31 votes
9 answers
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What is the process of going from machine code to electrically controlling individual transistors? [closed]

For someone who writes software but doesn't have a computer engineering background, the dozens of abstraction layers have always bewildered me. I know all source code in their most fundamental level ...
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4 Channel NOT and AND Gate Symbols

I am designing an ALU for my computer architecture class. The rubric states that we need to simplify each logical part to make it as clear as possible. My group condensed the 4 NOT gates and 4 AND ...
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2 answers
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How many ALUs (and threads) are in a Pentium CPU?

I'm reading a book bottom up where it said: The Arithmetic Logic Unit (ALU) is the heart of the CPU operation. It takes values in registers and performs any of the multitude of operations the ...
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1 answer
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Designing a Carry lookahead unit using EEPROMs, creates oscillator

I have read something about CLUs (Carry Lookahead Units) and want to build one. I have settled on a design using EEPROMS as ...
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3 answers
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when and how is the machine language (binary stream) mapped to an existing instruction?

I'm trying to better understand the entire process of coding, which involves translating the higher level languages (c++/java/python and so on) into binary data that tells the CPU to execute ...
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40 votes
6 answers
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Why does Intel's Haswell chip allow floating point multiplication to be twice as fast as addition?

I was reading this very interesting question on Stack Overflow: Is integer multiplication really done at the same speed as addition on a modern CPU? One of the comments said: "It's worth nothing ...
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4 votes
1 answer
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Microprocessor architecture bits vs bus sizes

I am ready following on this website: "Another big difference between 32-bit processors and 64-bit processors is the maximum amount of memory (RAM) that is supported. 32-bit computers support a ...
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Choosing the best approach for data selection in a datapath

For a university project, I have to design and construct a very simple CPU including the ALU. In order to select between different data lines that go into the ALU(32-bit data line), I have thought of ...
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How does a computer know when to "get" the output from the ALU?

Basically what the title says, I guess I've got some sort of misconception or somthing probably. The ALU can have, say, a ripple carry adder which doesn't produce its entire output all at the same ...
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ALU Design in verilog HDL

Below is my code for ALU which instantiates a 4:1 MUX and a 32 bit squarer modules. The port connections can be seen in module instantiations. However it is important to mention here that input of MUX'...
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Parallel Prefix Adder explained

I think I have understood Carry Lookahead adders. However, I don't really understand how parallel prefix adders evolve from carry lookaheads. Can someone explain to me the difference between PPA and ...
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1 answer
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Designing a 2-bit ALU [closed]

I want to design a 2-bit ALU that does XOR, OR, AND, and addition. With help of Wikipedia: I designed this: However, it's not working. I tried connecting the controllers to S0, S1, S2 but no ...
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3 answers
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Why does a full adder need an OR gate?

I have read and I understand how the full adder works (or atleast I think I do :D). It combines two half adders and either one of them can have a carry over, hence the OR gate. But why do we need ...
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Do binary numbers move in sequence ones and zeros or parallel at once to ALU for addition?

Do binary numbers move in sequence ones and zeros or parallel at once to ALU for addition, I mean ones and zeros in sequence vertically to ALU or parallel horizontally AT ONCE?
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