Questions tagged [alu]
ALU is the acronym for arithmetic and logic unit. This circuit performs arithmetic and logic operations in a processor.
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Create VHDL Register
I have a lab where we are given a 15 bit number. The 15 bit number contains 5 tuples and each tuple is an instruction for a State Machine to implement the ALU we designed previously. We need to take ...
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1answer
23 views
Parallel Prefix Adder explained
I think I have understood Carry Lookahead adders.
However, I don't really understand how parallel prefix adders evolve from carry lookaheads. Can someone explain to me the difference between PPA and ...
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ALU not working in Verilog MIPS Single cycle implementation
I have written the following code in Verilog which for the time being caters to only a subset of R-type, load word and store word instructions in the single cycle implementation based on the diagram ...
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49 views
Micro architecture and Micro instructions
I'm having trouble understanding an old exam's solution to an exercise. It reads the following:
"The value 0xA3 is stored in MPC
MDR contains: 0xAAAA AAAA
H contains: 0x5555 5555
LV contains: ...
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1answer
72 views
Designing a 2-bit ALU [closed]
I want to design a 2-bit ALU that does XOR, OR, AND, and addition.
With help of Wikipedia:
I designed this:
However, it's not working.
I tried connecting the controllers to S0, S1, S2 but no ...
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3answers
92 views
Why does a full adder need an OR gate?
I have read and I understand how the full adder works (or atleast I think I do :D). It combines two half adders and either one of them can have a carry over, hence the OR gate. But why do we need ...
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1answer
39 views
Do binary numbers move in sequence ones and zeros or parallel at once to ALU for addition?
Do binary numbers move in sequence ones and zeros or parallel at once to ALU for addition, I mean ones and zeros in sequence vertically to ALU or parallel horizontally AT ONCE?
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2answers
75 views
How to get the MSB into a logic gate which will check if a number is negative or not?
I need to create a logic gate which will find out whether a number is negative or not.
The input is 8 bits and the output is 1 bit, and if the input is 1 (i.e. negative number) then the output ...
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1answer
133 views
How to find out if the input of a logic gate is negative in two's complement?
I'm trying to create something which will output whether the input of the logic gate is a negative number or not in two's complement. I understand how twos complement works etc, but i'm not entirely ...
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3answers
65 views
How to find out if a binary number is zero or not using logic gates?
I'm trying to put some logic gates together which would perform a task of finding out whether a number is zero or not. I came across a thread like this on here already (How to find out if a binary ...
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1answer
68 views
How to use comparator functions of 74LS181?
I'm experimenting with the 74LS181 ALU (see here if you like), and it is going well, but I am unable to figure out how to use the A=B, A>B, and A<B comparator functions.
The datasheet states, "...
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2answers
104 views
Are floating point numbers denormalised before the processor performs arithmetic operations on them? [closed]
Does the processor denormalise the numbers in IEEE 754 notation and normalise the result after storing or are the arithmetic operations performed on the numbers as they are?
I'm asking because in case ...
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0answers
172 views
SLT in Logisim help
I have designed an ALU in logisim that can do arithmetics like add, sub, and/or. I am also trying to design the slt function. Basically when F is 111, if A < B then the ALU should output value 1, ...
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1answer
73 views
What is the True Pinout and Function of the 74ls181 in both of its modes (Active High and Active Low)?
I've found several datasheets for the 74ls181 with pinout and function diagrams as pictured below.
This from Jameco (where I bought mine): https://www.jameco.com/Jameco/Products/ProdDS/46973.pdf
...
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2answers
107 views
Bus tapping in Xilinx ISE for 8 bit to 16 bit conversion
I have a processing unit which is controlled by a sequencer/control unit. The agenda of this processing unit is to multiply 2 numbers using 8 BIT registers using the bit shift and add method.
Once ...
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0answers
15 views
Rom.txt in quartus prime [duplicate]
What is rom.txt in quartus prime? What does it do? How do you change it and implement?I’m building a 8 bit alu. Thanks
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1answer
296 views
Design on ALU in multisim
I am trying to design a simple 2 bit ALU which can perform addition, OR and XOR. Here's the picture of my design in multisim.
Problem with my design is i'm not understanding the purpose of select ...
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1answer
67 views
SN74LS181: The comparison function, A=B, not operating
I have six SN74LS181N-B circuits for arithmetic functions. I intend to utilise the A=B output, which is the comparison function. Sources have indicated that this function operates, if subtraction is ...
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1answer
103 views
Need help understanding the status output generation of an ALU
I'm currently trying to implement a simple processor using Verilog in a FPGA. I'm using Mic - 1 architecture as a reference model.
The thing I can't understand is the ALU is generating a "status" ...
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2answers
129 views
Why is the inverter need in this ALU?
I'm studying computer architecture and I wonder why the inverter is needed in this ALU?
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1answer
137 views
Design of Arithmetic Section
While going through topic on ALU design. I came across the point.i.e Design of Arithmetic Section .But what confused me is what is it's purpose in ALU. I'm thinking it in terms of performing basic ...
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1answer
139 views
Why would ALU Output be Asynchronous with Input Change?
Wikipedia states "An ALU is a combinational logic circuit, meaning that its outputs will change asynchronously in response to input changes."
But, the definition of a combinational logic circuit is: "...
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5answers
256 views
Why are ALUs still serial?
One of the most common optimizations used in modern processors is to keep the silicon as busy as possible. Cache units access memory for the processor so other circuitry isn't tied up for the dozens ...
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1answer
320 views
Why is the output to this 74181 ALU circuit always on?
I recently built an ALU circuit using the 74181 4 bit ALU. The circuit I built is below:
simulate this circuit – Schematic created using CircuitLab
Please note that the pinout in the ...
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1answer
423 views
2 x 74LS181 4 bit ALU's cascaded to form 8 bit ALU, Cin problem?
When trying to add two numbers on my two cascaded 74LS181's I find that the result seems to be right when I tie the carry (Cn) of the least significant one to Vcc, contra my expectation that Cn should ...
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4answers
828 views
74181 ALU not working properly cascaded to add 8 bit numbers
I'm trying to make a homebrew CPU but having problems with the 74LS181 ALU, which I'm simulating in Logisim software before diving into real ICs and breadboards.
I've cascaded two 74181 following ...
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1answer
122 views
In an ALU, is every function calcuated simultaneously?
I'm designing a 4 bit ALU as a project. I have circuits that can calculate addition, subtraction and bitwise logic operations - my question is, do I tie A & B (4 bit inputs) to every circuit that ...
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1answer
744 views
Why don’t most RISC ISAs write integer MULH/MUL or DIV/REM to two general-purpose registers? [closed]
Most hardware multiplication and division algorithms can compute the high and low words of a product of two integers, or both the quotient and remainder of the division of two integers, at the same ...
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1answer
848 views
How to create Verilog or VHDL from a Quartus design
I have done a Quartus design from logical primitives for FPGA. Now I would like to see the corresponding Verilog or VHDL if feasible. Is that possible with Quartus and if so, how?
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2answers
2k views
ALU carry in/out
Say there is an ALU with 3 inputs (A, B, Cin) and 2 outputs (Res, Cout).
It has functions [A plus B, A minus B, B minus A, A or B, 0, 1].
From my understanding, this is how the carry-in/out work for ...
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3answers
1k views
does 8085 CPU have an extra register within ALU?
From the 8085 CPU architecture, when ALU done calculation, the result is clocked back to accumulator A on next clock edge. But accumulator A is directly wired as ALU input, what if the clock edge didn'...
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336 views
Why my ALU is not working?
I built an ALU using ModelSim "Verilog", I compiled the code successfully, but I can't get any signal in neither (ans, y, zero), can you tell me what's wrong with my code? Thanks!
...
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2answers
2k views
Which register holds the final arithmetic and logic results?
This Wikipedia page says
an accumulator is a register in which intermediate arithmetic and
logic results are stored.
So which register holds the final result?
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4answers
717 views
Replace ALU With Lookup Table? [closed]
Disclaimer: So this is obviously a silly question and I want to start by saying I don't want to discuss the financial costs of this, as I'm aware CPU cache is expensive. As this hasn't been made ...
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1answer
103 views
Multiple data bit widths in a 4 bit adder?
So I am learning digital logic and have learned how to create an adder and have come across this question. So I am creating a 4 bit adder. To create the 4 bit adder I just make one 1 bit full adder ...
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362 views
Calculating MIPs
Im working on the following question:
I got the following answer is it correct?
a) The total time = 10ns + 10ns +10ns = 30ns
To calculate MIPS, divide one second by 30ns.
MIPS = (1 x 10^9)/30 = 33,...
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1answer
382 views
What is “formal verification” of hardware?
I read that testing and verification are different but in what way? I read that somebody writes theory to prove that the hardware is "correct" but how is that done? I tried reading Wikipedia and ...
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2answers
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1answer
259 views
Use 3-8 MUX instead of Case statement [closed]
I've been thinking about implementing a very simple ALU, and came across this link Verilog 8 Bit ALU. This seems to be a very naive and abstract but intuitive implementation. I'm thinking about ...
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2answers
140 views
ALU,RAM and ROM test for LPC 1778
Im working on a non safety project and as part of the Initialization tests I wanted to check the internal memory of LPC1778 for proper functionality before beginning the application.
I dont intend to ...
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1answer
172 views
Adding BGTZ to One-Cycle MIPS CPU
I'm trying to add the MIPS assembly command BGTZ to the following circuit:
I know that BGTZ takes the register value and sees if it's greater than 0. If it's greater it branches to the target. Can I ...
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4answers
652 views
How does a computer deal with subtraction of 2 values that are in two's complement?
I'm confused how the computer calculates if there are two values A and B, both are in two's complement. Now we want do the ...
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2answers
87 views
Trying to understand this table - comparator with carry
Create a circuit-table which compares two (signless) 4-bit binary numbers. The result is output signal c_i which is 1 if we have A≥B.
Given is A=0100 and B=0010. Fill the table whereby you choose c_-...
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2answers
4k views
How do computers calculate sin values? [closed]
How does a computer calculate a sin value? Logically, when I think about it the only apparent way is to put many sin values into memory, and when a sin value needs to be "calculated" it would just ...
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1answer
144 views
How do you fill this circuit-table correctly (digital comparator)?
The following task is from an old exam and because the new exam will be similar to this one, I'm trying to understand it. Unfortunately there are no solutions or hints given and I got nothing to ...
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0answers
52 views
Is it possible to execute a left shift in a single clock pulse? [duplicate]
I am currently designing my own 16 bit CPU and want to have a logic left shift instruction. I can make it shift only 1 position easily, but I want it to shift it b positions. Is that possible in a ...
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1answer
74 views
Simple methods for synthesizing circuits [closed]
I'm studying systems engineering and I am currently attending a course in computer architecture. In our career, we don't have much training in regard to hardware, so we find very hard to synthesize ...
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2answers
762 views
What does the logic statement “F = AB” mean? Bitwise A AND B?
On an ALU data sheet there are logic formulae showing the results that will be output for various inputs.
http://www.farnell.com/datasheets/1840939.pdf
(Second from last row on page 3.)
I assume ...
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2answers
2k views
Designing a 8 bit ALU
I have started designing a 4 bit Arithmetic and logic unit.
The sample image is as follows:
The function Table:
My question is: Is it possible to design an 8 bit ALU having the same ...
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1answer
953 views
Display Double Digit Numbers on 2 seven segment displays
I'm making an Arithmetic Logic Unit(ALU) for an assignment and I'm on a point. So according to my circuit design on the link shared below, I am able to output 1 digit of my alu. It is a 4 bit ALU so ...
