# Questions tagged [arithmetic-division]

Division of integer or floating-point numbers represented as bits. For analog division tag with [analog-computer] instead.

25 questions
1answer
66 views

### Signed Integer Division Optimization

I've implemented a division algorithm on an FPGA using the long division algorithm. My implementation does not use pipelining, but works iteratively and requires very few logic elements since the ...
1answer
26 views

### Can specific pipeline latency arithmatic block be inferred when using * or / operator in VHDL?

When using the * or / in VHDL, the synthesis tool shall infer the appropriate IP block to carry out that operation. If we open the actual GUI for that IP block we can find a lot of options e.g select ...
1answer
128 views

### Why overflows are omitted in the non-restoring hardware binary division algorithm?

I'm reading a book about a non-restoring binary division algorithm, for example 52_octal divided by 41_octal: ...
0answers
110 views

### VHDL Xilinx IP Core Divisor problem for signed fixed point

I hope you can help me since I believe this is a very specific error and I do not know how to solve. I want to divide 2 numbers represented like: 4bits : integer part 4bits : fractionary part So I ...
2answers
212 views

### How to divide complex number in VHDL?

I know how to divide numbers in VHDL (or using one of the Xilinx IP core generators) but I do not know how to do it in the case the numbers are complex. In my case I have defined a complex number as ...
1answer
119 views

### Digital Multiplication, Subtraction, Division Integrated Circuits?

Having a hell of a time finding ICs that offer multiplication, subtraction and division? Are these functions just a product of adders and not worth the fab?
1answer
242 views

### 8051 24bit BCD division

I am currently working on a 8051 assembly program which receives a set of BCD inputs and calculates the mean of this set. However, I couldn't figure out a decent way to divide 24bit BCD number. For ...
1answer
1k views

### Verilog modulo without using “%”

I'm interested in Verilog, but I have a question. I tried to implement modulo without using '%` operator. So I made it this way: ...
1answer
805 views

### Why don’t most RISC ISAs write integer MULH/MUL or DIV/REM to two general-purpose registers? [closed]

Most hardware multiplication and division algorithms can compute the high and low words of a product of two integers, or both the quotient and remainder of the division of two integers, at the same ...
6answers
10k views

### Why does hardware division take much longer than multiplication?

Why does hardware division take so much longer than multiplication on a microcontroller? E.g., on a dsPIC, a division takes 19 cycles, while multiplication takes only one clock cycle. I went through ...
2answers
3k views

### Why does signed (2's complement) binary multiplication have different procedure than unsigned?

The 2's complement binary multiplication does not have same procedure as unsigned if the both operands do not have the same sign. What is the logic behind that? Does special consideration apply to ...
1answer
548 views

### Can fixed point division be implemented using a divider that outputs quotient and remainder?

From what I have seen, division is a highly expensive operation in terms of time or area (tradeoff). It is usually implemented as an operation of continuous subtraction of a number from another number ...
3answers
123 views

### Using Three-state logic to speed up floating point multiplication

This question is idle pondering but... Given "double-precision" is 53 bits, so takes 53^2 (or 2809) largely ordered sequential operations to perform multiplication. Whereas the equivalent ternary ...
2answers
2k views

### SRT division vs Non restoring division

Assuming base b=2, is there a particular advantage in terms of performance when comparing SRT division to non restoring division? In Non restoring division, for ...
1answer
84 views

### On-line arithmetic vs digit recurrence, are they different?

I'm looking at some reference to "On-line arithmetic",in chapter two of this PhD thesis there's a description of such methods. There's a recurrence derived at some point in such thesis that reminds me ...
1answer
1k views

### Division circuit

On the picture below is shown a circuit for arithmetic division. Can somebody please tell me how does it work? I am struggling to understand it as I am new to this area. Note: This is not a homework ...
2answers
687 views

### Dividing numbers on an FPGA

I wrote a program for a Cyclone II FPGA that divides 2 64 bit numbers and returns if the remainder is 0 using the modulus (%) operation. When I compiled the program with 64 bit numbers for the ...
1answer
805 views

### I want to implement a math equation in FPGA, should I describe a CPU or can I do it just by code?

For a school project I'm trying to implement an equation for example like this: (EDIT) B = ((A + 2) * |A - 10|) / (c * c) everything is unsigned binary values, ...
2answers
2k views

### Divide by integer in VHDL

I need to divide an integer by an integer in one clock cycle. how should I do this? I have a function for it I found on the internet but it always returns one. ...
1answer
2k views

### Remainder of a 16-bit number divided by 3

I have to design a combinational logic circuit which accepts a 16-bit number as input and then calculates the remainder of the number divided by 3 as its output. I originally had no idea how to ...
4answers
24k views

### How does division occur in our computers?

How does division occur inside digital computers? What is the algorithm for it? I have searched hard in google but haven't got satisfactory results. Please provide a very clear algorithm/flowchart ...
2answers
4k views

### hardware implementation of division algorithm

I have tried hard but I don't understand how this algorithm is working.Please explain the flow chart. $DVF$ is the divide overflow flip flop. $A_s$ is the sign bit of $A$ $B_s$ is the sign ...
10answers
24k views

### Fastest way to get integer mod 10 and integer divide 10?

If a hardware doesn't support modulus or division operations, it takes many more CPU cycles to simulate modulus/division by software. Is there any faster way to calculate division and modulus if the ...
1answer
2k views

### System Generator: How to configure the CORDIC divider block. Understanding the block parameters

I have some dudes about the block parameters of the CORDIC DIVIDER. I would like to someone explain me the parameter called "Latency for each processing element". (See the parameters inside the red ...
10answers
7k views

### Efficient inverse (1/x) for AVR

I'm trying to find an efficient way of calculating an inverse on an AVR (or approximating it). I'm trying to calculate the pulse period for a stepper motor so that I can vary the speed linearly. The ...