Questions tagged [boolean-algebra]

In mathematics and mathematical logic, boolean algebra is the branch of algebra in which the values of the variables are the truth values true and false, usually denoted 1 and 0 respectively. Boolean algebra is used in the analysis and simplification of digital (logic) circuits

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Converting SOP to POS form

The boolean function I want to convert is: F = xy' + yz' I will first convert it to canonical form: F = xy' + yz' ------> (1) = xy'(z + z') + (x + x')yz' = xy'z + xy'z' + xyz' + x'yz' = Σ(2, 4, 5,...
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Logic operation on Karnaugh Maps?

Question: Normally I find Karnaugh Map of an expression from its truth table, but can we have Logic operation on two Karnaugh Maps ? Update:
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What pattern can be assumed to write the functions of a 16x4 priority encoder?

How can we find the expressions of the solutions without using K-Map or the Tabulation method?
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Universal operator

XMN(A,B,C,D)=(A XOR B) NAND (C NOR D). Is XMN is universal operator? a. yes without constants. b. yes with 0 constant c. yes with 1 constant d. yes with OR gate. e. no. What does it means universal ...
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How to convert bdd to cnf using cudd package?

I am using cudd package to create ROBDD from given circuit. Now I am interested in converting that ROBDD in CNF form. Can we do that, anyone, who has done that?
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I have a problem with understanding the attached ALU (6 control bits)

I have an Arithmetic Logic Unit, as shown below (I also included a CircuitJS simulation of it, so it will be much easier to understand the inner working of said ALU). ‘x’ and ‘y’ are the 4-bit input ...
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48 views

Using Associativity to Reduce Number of OR Gates

EDIT: I think I'm probably more confused than I realise. My question could also be phrased as "how was the given diagram constructed from the expression, particularly with reference to the OR gates?" ...
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54 views

Remake a Circuit using Multiplexers

I made this circuit yesterday using normal logic gates and chips: $$(AB)+(A\bar BC)+(\bar AC)$$ Now I have to remake it using only MUX but Im having some trouble. From my understanding I should use ...
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40 views

Minimum number of transistors to implement cmos logic of this function

I have designed the following circuit to implement cmos logic of : \$out=\overline{(a+b).\overline{c}+e.(\overline{f}+\overline{g})}\$ I’m looking for optimal circuit with minumum number of ...
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81 views

Solving CMOS logic structures

Can somebody please help me with understanding how to derive the equation from the red box from included picture (the other equations are trivial, it's just the right usage of De'Morgan's law)? I am ...
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Determine maximum length of repetitive sequence in synchronous FSM

I have the following realisation: The figure shows a synchronous circuit with the clock on Rising Edge. The circuit will generate a sequence of values on the output (abcde) of the five D-flip-flops. ...
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building a 3 input logic gate combination bounded by a simple if else statement

For 3 variables x,y,z and output w I need help buiding a ...
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Mapping XOR expression into K map

I know any SOP and POS can be minimised directly with the help of KMAP and there is no difficulty in mapping each Boolean product or sum term into KMAP. However what if the boolean expression is in ...
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Converting gates in XOR circuit to NAND gates

I have this XOR circuit: I tried to write it using only NAND gates and this was the furthest I got: According to my book, it should look like this: I did this: $$(x.y')+(x' . y) = ( (x. y')+(x' . y)...
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Can someone explain to be what I am supposed to do in these questions (simplifying boolean algebra)?

I'm reading Digital Design by M. Morris Mano and I am solving the exercises. I got stumped in some of the questions. In this one I am not sure how to do b). To get F I did the SOP using the truth ...
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Implementing 3 variable boolean function using mux 4 to 1 and inverter

I'm trying to understand if it's possible to Implement boolean function with 3 inputs using only mux 4 to 1 and inverter. As far as I understand I can put in the selectors the first 2 variables to ...
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Worst case scenerio in carry skip adder?

I am having trouble understanding this. worst case operation time takes place when carry is generated in the first block carry skips intermediate stages carry is killed in the last ...
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Realize using NOR gates only?

I came across a question regarding logic gates and I can't understand how to solve it. Q) Construct the truth table and write the boolean output equation. i) Realize using NOR gates only: $$f(A,B,...
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Boolean expression question

So im kinda curious which this would be. I have a question to turn a Boolean expression into a logic circuit which I have no issues doing but im a little confused about this question. I will leave an ...
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Fully Simplifying a Boolean Expression with DeMorgan's Theorem

The expression I have is \$\overline{(\bar{A}B+\bar{A}C})+(BC + \bar{B}\bar{C}) \$, and I've been asked to simplify it using DeMorgan's Theorems. I've already made a start, which was to discount the ...
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66 views

When should we NOT simplify a digital signal in an expression?

When we do a simplification in a Boolean expression, sometimes we eradicate some Boolean variables, either from part of the expression or entirely if it's not needed. Is there a case in digital design ...
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Minterms from Logic Circuit

I have the following logic circuit: And I'm asked to identify the minterms in F's truth table. The expression for F is F = C + A'B' and the truth table isn't too difficult to construct (X=F): I ...
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2answers
122 views

Finding a minimal cost function from a Karnaugh Map

Below is a problem I made up and did. Is my solution wrong? Problem: Attached is following map for the function \$f\$. We want a minimal cost expression using only and, or and not gates. The cost ...
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1answer
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Implement boolean expression with AOI

Below is a question in my homework: \$F(P,Q,R,S,T)=(P+Q)S+(R+T)\bar S\$ using one or more 2x2 AOI."> Here's my attempt for (a): Step 1: simplify boolean expression. \$F(P,Q,R,S,T)\$ \$=(...
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Tricky problem regarding CMOS

My lecturer gave us the following problem today: "A CMOS gate (with inputs A, B, C) consists of a pull-up network with 0 or more PMOS transistors, and a pull-down network with 0 or more NMOS ...
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Proving something is true in Boolean Algebra given two equations and two variables without using a Truth Table

Problem: Given that $$ AB = 0$$ and $$A + B = 1$$ and using only algebraic manipulation is it possible to prove that: $$ \overline A = B$$ Answer: I believe it is, but I have failed in my attempt ...
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Simplifying a Boolean Expression with two additional conditions

Problem: Given that $$ A \cdot B = 0$$ and $$A + B = 1$$ use algebraic manipulation to prove that: $$ (A + C) \cdot( \overline A + B ) \cdot (B + C) = B \cdot C$$ Answer: First, I will rewrite the ...
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31 views

Digital Logic Boolean Algebra

I am having a hard time understanding why A'+B' is not equal to the following expression: I understand that when I apply the 4 different combinations: 00,01,10,11 to A and B I get different results ...
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2answers
48 views

Sum-of-Product understanding

I am trying to learn Sum-of-Products and minterms and maxterms for logic design, but I don't know how the book gets the f(x1,x2,x3) part. I think I understand the minterm from the first pic (it's ...
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K-map: how to decide which implicant to be prime

I am a bit confused about deciding which implicants to turn into prime. If I group implicants 1 and 2 into a bigger implicant, can I group implicants 2 and 3 as well? For example, if I have the K-map ...
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1answer
31 views

What is meant by taking dual of a boolean expression?

I read online that if we have a set of SOP terms giving a boolean expression, then the POS terms of the complement of the SOP terms will give the same expression. POS(f)=SOP(f'). This is called ...
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32 views

How is the boolean expression for mux2 and mux4 deduced?

I've been looking at the following article: https://www.electronics-tutorials.ws/combination/comb_2.html I am confused as to how the boolean expression Q = a'b'A + ab'B + a'bC + abD is deduced for ...
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Simplifying a logic expression with 3 variables

Below is a problem that I did. I am hoping that somebody can verify that my work is correct or tell me where I went wrong. Thanks. Problem: Simplify the following expression using Boolean Algebra: $...
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1answer
93 views

Simplifying a Boolean expression that has 3 variables in it

Problem: Simplify the following expression using Boolean Algebra: $$ z = (B + \overline C)(\overline B + C) + \overline{ \overline A + B + \overline C} $$ Answer: \begin{align*} z &= (B + \...
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2answers
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Trying to simplify a Boolean expression

Simplify the following expression using Boolean Algebra: $$ x = \bar{A} \bar{B} \bar{C} + \bar{A}BC + ABC + A \bar{B} \bar{C} + A \bar{B} C $$ Answer: \begin{align*} x &= \bar{A} \bar{B} \bar{C} +...
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Boolean Expression Minimization Question

How does one simplify this expression further? f(a,b,c,d) = a'b' + b'c' + b'd' + a'cd' + bcd The simplest form is f(a,b,c,d) = a'c + b'c' +b'd' + bcd I've been staring at it for a while and I don'...
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1answer
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How to optimise a logic circuit? [closed]

I have the following 15 sets of binary outputs: ...
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Why does F + F' = 1?

I have the function: \$f(x,y,z,w) = wx + yz\$ I found its complement function to be: \$f '(x,y,z,w) = w'y' + w'z' + x'y' + x'z'\$ I have to show that: \$f + f '=1\$ but I can't see how to do it. ...
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How come (x*y)+(x*z')+(y*z) = (x*z')+(y*z)?

As the title says, I just can't figure this one out. I started with the initial function: f(x,y,z) = (x'yz) + (xy'z') + (xyz') + (xyz) and I have simplified it all the way down to this: f=(xy)+(xz')...
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Deriving PU / PD given a sketch of a PMOS

For the PMOS given below I can derive the function f, such that f inverted in its variables corresponds to the expression of PMOS(f) and f inverted equals NMOS(f). For this specific problem I have ...
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70 views

Using NAND gates to construct OR/AND gates

I have this Boolean equation B'*C'*D' + A*C*D + C*D*E' and I was just wondering how to use nand gates to express this equation. With the schematic the inputs are NAND1 it is B'*C'*D' NAND ...
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use minimum number of NAND gates to realize this boolean expression [closed]

How should I proceed to find the minimum number of 2 input NAND gates to realize this boolean expression. I am allowed to use both complemented and non-complemented inputs. $$F = X.Y + Y.Z + \...
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196 views

Is there an intuitive reason for why NAND gate is a universal gate?

Now I know the maths and logic to figure out that every boolean function can be expressed using only AND and NOT gates, which in turn can be expressed using only NAND gate and hence every boolean ...
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63 views

Absolute difference with logical operators only

I'm trying to implement in a FPGA the test formula: abs(a-b)>1 a and b are unsigned 3 bits (0 to 7). The truth table is as follow: The test is: ...
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What is the significance of the OR gate in this Full Adder circuit?

simulate this circuit – Schematic created using CircuitLab I don't understand the significance of the OR gate in the Full Adder because I don't think its input AND3 and AND2 will both ever be 1....
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I am stuck at this step C(AB+A'B')(simplify using boolean laws)

I cant figure out is AB+A'B' =1 or another answer
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Writing Truth Table Given Function

so I am taking a summer course and the teacher is not so helpful at the moment so I was thrown the following question to do: Derive a truth table for the following function: \$f(x,y,z)=\sum m(1,3,5,7)...
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Truth Table does not exhaust all combination. Can it be translated to a circuit? Is it ill-pose?

Step|A|B|C ---------- 1 |0|0|1 2 |1|0|1 3 |1|1|0 4 |1|0|0 From the truth table above, I can not find the equivalent boolean expression hence I can not ...
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Are these tables the same?

Is it possible from the table in the figure to go back to the circuit? (without know the circuit) sorry for my bad english The table of the first and second images are the same, however, written ...
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Asynchronous Sequencial circuit homework problem

i have some problem with this homework, i cant figure out how to continue the project. I would be grateful if you could help me (Sorry for my bad english) "Given the table in the figure, continue the ...

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