Questions tagged [boolean-algebra]

In mathematics and mathematical logic, boolean algebra is the branch of algebra in which the values of the variables are the truth values true and false, usually denoted 1 and 0 respectively. Boolean algebra is used in the analysis and simplification of digital (logic) circuits

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boolean confirm result

I have solve an exercise and I would like to know if I find the result right. Is there a way so I can check that my solution is right? I think this method is called De Morgan. I had this and I find ...
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Trying to simplify a Boolean expression to \$X + Y + Z\$

Problem: Prove the following Boolean equation using algebraic manipulations: $$ Y + \overline X Z + X \overline Y = X + Y + Z $$ Answer: $$LHS = Y + \overline X Z + X \overline Y$$ \begin{align*} LHS &...
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How do you algorithmically calculate the booth recoding truth table for different radix?

Basically what I am trying to figure out is how one generates algorithmically the truth table for Booth's recoding for different radices of his algorithm. How would you generalize this into a truth ...
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Simplyifying a Boolean Expression that has three variables in it

The following problem can be found at the following URL: Some problems related to digital logic It is problem number 26 on the webpage. Problem: Simplify the following expression using Boolean Algebra:...
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Boolean algebra — minterms for 1:1 inputs and outputs

Let's say we have a truth table with two inputs (A, B) and one output (X). ...
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101 views

Meaning of logic operation “ a' ”

I have found the following expression: c = (a'.b) what does it mean? I know a.b is a and b (...
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108 views

Why do we always implement the complementary of the boolean expression when we design a CMOS circuit?

I am new to implementing boolean expressions in CMOS form, and I understand that the "C" in CMOS stands for "Complementary", so it is an inverter circuit. What I don't understand ...
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Combining MUX 4x1 to represent 5 variable function

I have the following function x’y’zw’v’ + x’yz’w’v’ + x’yzw’v’ + xy’z’w’v’ + xy’zw’v I should implement it using only 4x1 MUX (more than one allowed, of course). I'm clueless on how could I combine ...
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How to implement a 2 digit BCD subtractor with only 2 7483s?

I need to build a 2 digit BCD subtractor with the limitation of only having 2 7483 (4 bit adders). Additionally, 20 > minuend >= subtraend. With those limitations in mind, i can see that if the ...
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51 views

How to convert a Boolean expression from POS form to SOP form?

POS equation is given as F=pi(3,8,12). By converting POS to SOP form directly I get F=sigma(0,1,2,4,5,6,7,9,10,11,13,14,15) But according to the process given in the above picture F is given as F=...
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58 views

When do we use minterm over maxterm in real words example or vice versa?

This may sound stupid. We have minterms. It is a product of all variables in a function and that function has the property that it is equal to 1 on exactly one row of the truth table. What do we call ...
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I need help finding out how to prevent my components from exploding (TinkerCad)

Basically, I'm making a logic circuit on TinkerCad and I need to turn on a seven-segment display but some of my components explode and I've got no idea how to solve this. The components I'm using are:...
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Will the Boolean equation change when we reduce the CMOS transistors in a static CMOS logic?

We are doing a project about a multiplier. Two of my teammates are assigned to make the transistor level designs of the adders, subtractors and few barrel shifters. My prof has told me to make a ...
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How to know whether addition has been done in a parallel binary adder?

I am little new to electronics and getting some high level overview of digital electronics. The question is that how to know whether addition has been performed in a logic circuit. For example I have ...
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Karnaugh map: What values to combine?

I have obtained the Karnaugh diagram (pictured below) and now I'm trying to obtain the Boolean expression of K3 through this diagram. My inputs are Q1, Q2 and Q3. I'm trying to "group" 1's ...
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Does the exclusive AND gate exist?

i have just received an assignment to identify what logic gate circuit of the given logic gate symbol indicates in the attached image. Parts a) and d) are easy, but are there gates like pictures b) ...
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How do I verify my solution is correct for a circuit diagram?

The original problem: The trouble I'm having is that I'm not sure at all if my boolean expressions from the circuit diagram for (1) are correct; I also know that I ...
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1answer
43 views

Simplify logic function [closed]

I am having a hard time simplifying this logic function: \$ f = \overline{x_3}\cdot\overline{x_4} + \overline{x_1}\cdot\overline{x_3}+\overline{x_2}\cdot\overline{x_3}+\overline{x_1}\cdot\overline{x_4}...
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How to implement a comparator logic gate in Quartus software? [closed]

Been trying for hours...How do I properly implement the following expressions: F0 = A0'A1'B0 + A0'B0B1 + A0B0'B1' + A1'B0B1 F1 = A1'B1 + A0'A1B1' + A0A1'B0' + A0B0'B1 + A1B0B1' I'm using NAND & ...
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How do I turn a 4-variable k-map with don't cares into a simplified boolean expression?

The trouble I'm having here is that I don't know a method (well I do know I could do it the long way i.e w'x'y'z' + w'x'y'z . . .) for turning this into a simplified boolean expression. I've done some ...
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Is my redundancy identification and K-Map grouping correct?

(Problem 7). Am I correct in saying that (m2, m6) the one circled in purple on the k-map is redundant? Also, if that is the case, how do I remove it from the boolean expression? I mean I turned that ...
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How to prove the SOP and POS are equivalent to one another in XOR Funtion?

Write two Boolean expressions for the Exclusive-OR function, one written in SOP form and the other written in POS form. Simplify both expressions using Boolean algebra reduction and show that the two ...
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58 views

How to split an 8 bit BCD number into two separate 4 bit BCD numbers using logic gates or VHDL?

I think this might actually be quite simple but I can't find info on it anywhere and I can't think how I would do it. I want to split an 8 bit BCD into two 4 bit BCDs so for example if I get an input ...
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47 views

Writing function using sigma?

Suppose I was given: $$g(w,x,y,z)=(x+ y ̅+ z ̅ )( w+ y ̅+ z ̅ )( w+ x ̅+ y ̅ )$$ Then I can write it like this: \begin{align} g(w,x,y,z)&=(ww ̅+x+ y ̅+ z ̅ )( w+ xx ̅+y ̅+ z ̅ )( w+ x ̅+ y ̅ +...
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Simplify x'z+yz'+x'y?

Given: $$x'z+yz'+x'y$$ How can I simplify it to: $$x'z+yz'$$ I tried: $$\begin{aligned} x'z+yz'+x'y &= x'(z+y)+y(z'+y) \\ &=x'z+(x'y+y) \\ &=x'z+y(x'+1) \\ &=x'z+y \end{aligned}$$...
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Method to realize any function with 2 input NAND/NOR gate

I'm preparing for a competitive exam where often these type of questions are asked Find the minimum number of 2 input NAND gates required to implement the function F(A, B, C, D) = AB + ACD + BC’ ...
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1answer
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How can I solve these Verilog questions? [closed]

I am new to Verilog Language. I did answer the questions below but I am not sure if my answers are correct. I would appreciate verification to my answers and any feedback if I am wrong. Also, if 3rd ...
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8x3 Priority Encoder question about the output functions

Cheers, I have this 8x3 encoder with inputs of Ai and outputs Yj. I have to find the minimized function of the outputs. [![8x3 Priority Encoder Truth Table][1]][1] I understand that for Y2 the output ...
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How does this Boolean simplification work?

I've just started learning about Boolean identities and simplification, and I'm already puzzled by one rule. I'm following this tutorial, which presents the following rule: ...
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Implement boolean function with given components

I have to implement these functions using the following components only $$F_1(A,B,C) = AC + BC'$$ $$F_2(A,B,C) = AC + B'C'$$ $$F_3(A,B,C) = A'B + AB'$$ Components given: 1:4 DeMux with active high ...
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Digital logic design/Circuit

Can I write this boolean equation A'B'C + A'BC' + AB'C' + ABC As A xor B xor C Thanks
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Digital logic design /circuit

Can I further minimize this boolean expression A'BC+AB'C+ ABC' As I guess It can't be further minimized
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101 views

How to implement the following boolean function with a 8:1 mux?

The following boolean function is given $$ f = (\neg a \land b \land \neg c) \lor (a \land b \land \neg c) \lor (a \land b \land c)$$ which should be implemented with a 8:1 mux. Write down the truth ...
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Is the disjunctive normal form unique?

As the title says, is the DMF always unique? And if no, is there an example of a function that has more than one DMF?
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How to draw vector as input

I have implemented a function f which takes as input 4 digits vector, how could I draw that correctly? I know how to draw a function with 4 inputs but not one with vector on inputs. An image could be ...
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1answer
42 views

Two channel logical switch

I'm trying to make a theoretical automated battery charger using a reactor only with logical gates, and I wanted to use charge cycles between 30 and 80% for efficiency sake. I can output a 0 or a 1 ...
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306 views

How should an AND-OR-INVERT gate look like?

I was asked to implement a logic expression (F = A'B' + C'D' + AC') with AND-OR-INVERT(AOI) gates. I made the circuit (Figure 1) below, but I looked it up on Wikipedia and found that AOI gates are ...
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Does this circuit include two level logic circuits?

I made the circuit below from the logic expression below. A'B' + A'C' + A'D + ABC But, I was told to consider adding two level AND-OR and NAND-NAND logic circuits. I think the circuit below has them,...
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Strategies to come up with chip design (Full Adder in this case)

(I'm not asking for a solution to the Full Adder chip design, just strategies for how to come up with a solution myself) For a course I'm following (Nand2Tetris), I'm trying to design a Full Adder ...
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57 views

SOP and logic expression for a circuit

I'm having trouble doing the Sum-or-product of this truth table and then simplifying the logic expression. For the SOP i got Y= A’.B’.C’.D’+ A.B’.C’.D’+ A’.B.C’.D’+ A’.B’.C.D’+ A’.B’.C’.D+ A.B.C’.D’+ ...
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116 views

Where can I connect the unused input to preserve the logic expression?

So there is an unused input for the bottom NAND gate (even though it is not shown in the picture) and the question wants us to connect it while preserving the logic expression. I know when we connect ...
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65 views

Maxterm: misinformation or different approach to understanding

I have found myself in a crossway of two different explanations regarding Boolean algebra, Maxterm. However, I cannot grasp, whether there is a trick to it or whether one of explanations is an actual ...
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What is a canonical representation?

We had our Digital Systems class today, and our professor kept throwing around the word 'canonical' around a whole lot, but I'm very confused as to what this is. What I understood is that it's the way ...
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111 views

Use minimum number of half adders for the boolean expression [closed]

I got this question in my exam, and I cannot find the answer to it. My professor also didn't provide a clear solution. Can someone please help me in this? Design the expression F(A,B,C,D)=AB' + AC' + ...
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Using boolean algebra, simplify $$y = \bar{s} \cdot \bar{u} + s \cdot \bar{u}+s \cdot u$$

I have the following function, that I want to minimise using boolean algebra: $$y = \bar{s} \cdot \bar{u} + s \cdot \bar{u}+s \cdot u$$ Here's my attempt: $$\bar{s} \cdot \bar{u} + s \cdot \bar{u}+s \...
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1answer
397 views

Can Quine-McCluskey Method be used for Product of Sum simplification?

Can a product of sum function be simplified using the Quine-McCluskey algorithm? If so, how? I saw this post on Math SE addressing the same question, however the answer does not explain how the ...
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1answer
55 views

How to write Boolean Algebra of a CMOS circuit?

How to write the boolean algebra of this circuit? I am confused with the inverter in the middle . Any help will be greatly appreciated!
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3answers
313 views

Simplify the boolean function $$Z=A\bar B \bar{C_i} + \bar A B \bar{C_i} + \bar A\bar B {C_i} + A B {C_i}$$

I want to simplify the following boolean function: $$Z=A\bar B \bar{C_i} + \bar A B \bar{C_i} + \bar A\bar B {C_i} + A B {C_i}$$ Here's my attempt: \begin{align} Z &= A\bar B \bar{C_i} + \bar A B ...
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1answer
326 views

Boolean Algebra: How do I implenent a 4 bit signed comparator

I'm studying for my digital electronics exam and I'm a bit lost here. The goal of the exercise was to build 2 4bit comparators out of single bit comparators, one using unsigned bits and the other with ...
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1answer
52 views

Using don't cares to reduce a function

We have the function: f = p'c' + pb' + qc With satisfiability don't cares given by SDC = {pb, q'b', qbc, q'*c'} The K-map for the function is : ...

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