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### Adding four numbers of 1 bit each and then cascading them

When I add four bits (NOT FOUR BIT ADDER, only four bits), the result can go to a maximum of 100 (4 in decimal, if all are ones). Now, here 0 (LSB) is the sum and 10 is carry. If I want to transfer ...
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### Concept of Booth Encoded Multiplier 8bit

So I'm kinda a newbie in this world so pardon me for the basic questions. I want to implement Booth encoded multiplier 8bit. Until now, I pretty much understand for the block diagram and what happened ...
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### Carry-select adder - Time calculation

a) Suppose a binary pick-up adder (carry-select) of 32-bits, comprising 4 sub-sections adders spreading carry of range 8 bits. Show the values ​​obtained internally in the circuit of this adder to ...
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I'm studying Digital Design and Computer Architecture book, I'm stuck in the section of the carry-lookahead adder because there's something that I don't fully ...
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### Implementing Carry look ahead Unit in logism

I'm quite new to logism and circuits and I have an assignment about implementing a carry look ahead unit. I Just want some help in regards to clearing some of my confusions to carry look ahead units. ...
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I know how we can prepare 4 bit look-ahead carry adder (CLAs) to avoid delay involved in rippling of carries in ripple carry adder. We calculate various signal in CLA as follows: Carry propagate ...
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### Designing a Carry lookahead unit using EEPROMs, creates oscillator

I have read something about CLUs (Carry Lookahead Units) and want to build one. I have settled on a design using EEPROMS as ...
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### CLA Propagate Term: Xor vs Or Gate

Okay say I have to use a CLA adder to implement the addition of two 2-bit numbers, X = x1x0, Y = y1y0. And say I have to write down the logical expression for the final carry-out. So C1 or the first ...
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An N-bit carry lookahead adder, where N is a multiple of 4, employs ICs 74181 (4 bit ALU) and 74182 ( 4 bit carry lookahead generator). The minimum addition time using the best architecture for this ...
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I'm new to Verilog programming. I'm trying to work up to a 64-bit CLA by building a 4-bit CLA, then an 8-bit (out of 2 instances of a 4-bit), then a 16-bit (out of 2 instances of the 8-bit one). I'll ...
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How is the time complexity of carry look ahead adder O(log n)? Can you explain in terms of gate delays?
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### 8 bit adder with 2 CLA

I need to make an 8 bit adder with 2 4-bit look ahead adders.I spent a lot of time reading about it and I think I get the gist of how it works, but I can't seem to get this. I spent a lot of time ...
1 vote
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How would you find the number of clock cycles it takes to produce sum, the carry out, and overflow flag using ripple carry or lookahead adder. Can someone please explain me how would we go on finding ...
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I usually only become a passive reader in this forum, but today I decided to ask my first question. How many logic gates required for a 4-bit Carry Look Ahead adder and Prefix adder? I know that ...
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I would like to make a 8 bit adder, with carry look ahead, but i only have 2-input logic gates. All I've heard about use some at least 4-input gates. Or do I need to use a totally different method, ...
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How can I find Gate Delay for bit 1 of the sum by a 4-bit look-ahead carry adder?
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### How do carry save adders work?

I thought I understood the concept but wikipedia has confused me. There are two outputs because one's for a partial sum and one's the carry bits. But why must it be used to "compute the sum of three ...
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I am a bit stuck with the concept of carry-lookahead adder so I'd like to compare it with another concept I'm more familiar with: the ripple-carry adder. I'm trying to make some basic math comparison ...
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### Design of an adder circuit

I have a adder circuit consisting of carry look ahead adders. However, I am not allowed to use the generate function to determine the sum of the two numbers. I am allowed to use basic logic operations(...
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### Multiply 4 Digit Binary Number By 3 - Circuit

I want to find a way to multiply a 4 digit binary number by 3. I have this circuit that doing this process and I don't understand how it works. To multiply a number by 2 I need to shift the digits ...
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In my textbook the gate delays for the n-bit ripple adder is given as $2n$ for $c_n$ bits and $2n-1$ for $s_n-1$ for the circuit as shown below: But, for a 4-bit Carry Look Ahead Adder ...
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I am taking comp architecture course, and we are given a task to write 32 bit look-ahead adder in VHDL. Instructor provided the instruction and diagram. While reading, Wikipedia article, I stumbled on ...
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I recreated and trying to understand for the sake of fun and learning the circuit that can be seen here on second page: Link . This is basically a 4-bit carry-lookahead adder, but there is one thing ...
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At my school we have Synopsis "design_vision" in the computer labs. I don't know how to use any of the features so to me it's just a schematic-drawing tool. Out of curiosity, I hand-coded in Verilog ...
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I am implementing a 32 bit CLA Adder like how a 16 bit adder is implemented in Wikipedia Problem is how do I determine if the block overflows? I will need the carry into bit 32 (which is now in the ...
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### Whats the difference with Carry Look Ahead Generator & Block Carry Look Ahead Generaor

Whats the difference between this 2 CLAG (Carry Look Ahead Generator) CLAG Block CLAG I mean, the way Carries of 1st 3 bits are the same and the last carry is actually $G*$? The difference is use ...
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