All Questions
8 questions
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Cascode Current Mirror, Minimum output voltage
I can say that I understand simple current mirrors fairly well, but what i do not understant is the minimum output voltage requierd for the circuit to work properly...for the transistors to be in ...
1
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1
answer
2k
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Cascode Amplifier Gain
I've been going through Design of Analog CMOS integrated circuits 2nd Edition by Razavi. I'm currently at the Cascode amplifier section. The author does an example for calculating the gain for the ...
1
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1
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500
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Cascode: Which device goes into triode region first?
In the above cascode network, which device goes into triode region first, if the supply gradually decreases?
Framing the question other way round, if the supply gradually increases from 0V, which ...
1
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2
answers
329
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Controllable rising edge shifting circuit using CMOS
I am building a circuit using CMOS transistors (350n technology) in which I have to delay the rising edge of a pulse, but not the falling edge. The circuit I made is the following :
And here is the ...
1
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0
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326
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Is a cascode better current source than current mirror ? Which option is better?
I have simulated a cascode and made a M2 in saturation so it will act as a current source. I want to understand which current source is better. Is cascode better because it has a higher output ...
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1
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498
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Finding the gain expression for this CMOS operational transconductance amplifier
So here's the circuit:
I think M2 is a common source amplifier and M4 a common gate amplifier, so they form a cascode amplifier where the gain is given by : Av = -gm2 * r0, r0 is the impedance at the ...
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1
answer
106
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Floating Nodes in PSpice
Hello I am designing a folded cascode amplifier with only long channel devices. I believe I have set up the schematic correctly but I am getting the following errors:
ERROR(ORPSIM-15142): Node VB1 is ...
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1
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568
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Output voltage in MOS cascode amplifier
I'll give a background to my main question:-
In a simple NMOS as shown, while constructing the small signal model of the MOSFET, when there is no resistance between Vdd and drain, NMOS is modeled ...