Questions tagged [chip-design]
Anything related to the design of integrated circuits (chips).
75
questions
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2answers
45 views
Do I need to make a timing report for min/max at Static Timing Analysis in Four categories of timing paths?
I've been studying to understand Static Timing Analysis aka STA.
One of what I can't understand is whether I need to make a report timing for min/max at Static Timing Analysis in Four categories of ...
2
votes
1answer
255 views
How dense is SRAM compared to random logic?
Modern CPUs always have some on-chip cache, typically more than one level. This takes a lot of die area; static RAM is generally reckoned at six transistors per bit.
That having been said, the ...
22
votes
14answers
11k views
Is there a theoretical possibility of having a full computer on a silicon wafer instead of a motherboard?
I have not seen a single reference where a whole computer is built inside a chip itself instead of modularizing and spreading it on a board.
I acknowledge that having modular parts enable versatility, ...
1
vote
2answers
49 views
Can drain and source length be smaller than minimum channel length in CMOS technology?
I know the channel width can't be smaller, but what about drain and source? Say, in 0.18u technology, what would be a typical drain/source length?
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0answers
25 views
Comparing two hardware accelerators with different number of MAC units
I am a software engineer but am admittedly a bit of a noob on the device side of things.
I am wondering how to compare two chips. Let's say both chips have hardware accelerator components. Only thing ...
1
vote
0answers
67 views
Can someone give me feedback about this adjustable floating voltage reference?
I am not sure actually with the name of the circuit so excuse me if the naming is not accurate.
What I am trying to make is I want to have an adjustable output voltage whose reference can be adjusted ...
0
votes
0answers
21 views
How to simulate temperature of interconnect and VIAs in designed IC?
How to simulate temperature of interconnect and VIAs in everywhere and any operation conditions of designed IC?
(design in Cadence by TSMC 0.18RF PDK)
Is it possible by Cadence or ADS?
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0answers
20 views
Strategies to come up with chip design (Full Adder in this case)
(I'm not asking for a solution to the Full Adder chip design, just strategies for how to come up with a solution myself)
For a course I'm following (Nand2Tetris), I'm trying to design a Full Adder ...
1
vote
1answer
48 views
What is difference between MOSIS and dedicate MPW services of foundries?
Most foundries, such as TSMC, SMICS, and Samsung have MPW and IC prototyping services.
What is the difference between these services and MOSIS or Europractice?
Question is:
Why use MOSIS services ...
6
votes
4answers
3k views
Why is the 8061 microcontroller described as having 256 bytes of internal memory?
According to doc (http://www.auto-diagnostics.info/pdf/ford_eectch98.pdf), this 8061 microprocessor chip contains 256bytes of internal
RAM (also referred to as register file in the doc). However, the ...
2
votes
0answers
104 views
Why are photomasks so expensive?
I just read the answer to this question asking how much a custom ASIC costs. It says that
When it comes to making an ASIC, the cost of the masks is HUGE. It is not uncommon at all for a set of masks (...
0
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0answers
85 views
ADS Non-Linear Demo Kit: Identifying the Transistor Model?
I have been trying to design a LNA using the ADS Non-linear demo kit library. I am trying to find the optimized bias point for stability and noise parameters, etc. The FET1 transistor is the device I ...
0
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2answers
96 views
Is integrated circuit packaging copyrighted/patented? [closed]
A friend of mine is interested in manufacturing ICs. He wants to know whether the different form types of packages (DIP, LGA, BGA) have intellectual property obstacles to using them. If so, who owns ...
0
votes
1answer
176 views
Are there technical documents about microprocessor design by Jim Keller? [closed]
Jim Keller has worked leading various chip design projects at Intel, AMD, Apple and Tesla among other companies.
Does anybody know of any technical documents about microprocessor design written by ...
2
votes
1answer
1k views
Difference between the words 'die' and 'chip' [closed]
In some articles speaking about the IGBT power modules, we can see that the word 'die' has been used for calling the semiconductor component of IGBT device. However, other articles calls it 'chip'. ...
1
vote
0answers
54 views
IGBT chip metalization
Consider an IGBT chip within a power module.
The top surface of the chip is often metalized by aluminum (with approximately 5 microns thickness) to bond some aluminum wires into the chip; I am hazy ...
0
votes
0answers
39 views
Junction Temperature Estimation Error
When predicting the junction temperature (Tj) of semiconductor chips (for example IGBTs) by available thermal models such as FEM simulations, how much is the maximum permissible Tj estimation error ...
0
votes
1answer
201 views
Are 7nm or 10nm transistors reality or is it just a marketing strategy by processor manufacturers?
Now a days chip manufacturers, like Qualcomm, claim that they have built a 7nm chip. Is 7nm really the size of transistor or is it just a marketing strategy? If 7nm is just for marketing and not the ...
1
vote
1answer
65 views
How the Cerebras across the reticle limits to produce the largest chip,WSE?
How are the connections made on wafer-scale circuits (50,000 mm2 and up), given that the imaging reticle limits are around 600 to 800 mm2?
1
vote
2answers
260 views
CMOS technology that works above 300 °C
I need technology in which the IC will work at temperatures above 300 °C. For example, Fraunhofer makes chips at this temperature using Tungsten interconnect.
Do foundries like TSMC or Globalfoundries ...
0
votes
1answer
101 views
Zero Voltage in a power semiconductor chip
In an ON-mode silicon IGBT chip operating within a real power module, is the collector contact fixed at 0 V or emitter?
What about Power SiC MOSFET?
enter link description here
0
votes
2answers
79 views
Addressing 45 Inputs Down to 6 pin Output
I'm looking for a chip which could minimize ~45 button inputs down to an 6 pin input for use with Raspberry Pi.
I know this is a simple problem and it has likely been solved before, but as an ...
0
votes
0answers
33 views
Temperature-dependent leakage current in IGBTs
On one hand, the leakage current of power electronics modules such as IGBTs depends on the temperature. On the other hand, the temperature distribution on the IGBT chips is significantly non-uniform ...
0
votes
1answer
47 views
Are there ways/technologies to use High negative voltages in flash memories?
I am using an FGMOSFET with tunneling gate and control gate as an analog memory for simulation in SPICE. I use -25V to inject electrons into the floating gate and 25V to remove electrons. Everything ...
3
votes
2answers
126 views
What is this? Identifying Proximity Sensor Chip (IR)
I am in a bit of a pickle. If anyone could help/has any ideas I will be very grateful - am aware this post is pretty long but thought if anyone was clever enough to know it would be you guys. If ...
0
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0answers
50 views
Non-uniform temperatue distribution
Please assume a semiconductor chip like IGBT or MOSFET heated by a specific power loss. It is found that the more the power loss is, the more severe the chip's temperature distribution non-uniformity ...
0
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0answers
60 views
Uneven chip temperature
When injecting a uniform power dissipation in a chip of IGBT power electronics modules by finite element method (FEM) in COMSOL (a good software for thermal analysis), a non-uniform temperature ...
25
votes
3answers
8k views
Why are chip designers called “triangle pushers”?
I heard chip designers being described as "triangle pushers," the idea being that somehow the logic on the chip was formulated by arranging triangles on the silicon in certain ways. How does this work?...
0
votes
1answer
203 views
Good practices for full-custom IC measurement? [closed]
I am a Junior Analog IC Designer and I want to characterize a full-custom IC. The thing is that I want to do it well and I don't know any reference with good practices and PCB design guidelines for ...
-2
votes
1answer
141 views
In modern CPUs, is the etched chip face-up in the packaging?
I know that the integrated circuits of the 1980s had the etched chip glued face-up inside the packaging, with tiny gold wires bridging the open space from the top surface of the chip, down to contact ...
0
votes
2answers
363 views
How do I attach an IC chip to a DIN rail? [closed]
I am using a 74AHCT125N to shift up voltage of pwm signal. The problem we are having is how to attach this chip to DIN rail. We were thinking of using a DIN rail mounted PCB. I am looking for ...
0
votes
1answer
134 views
QFN-like package identification
Can anybody identify this package? Looks like a sort of QFN to me but it's not square and I have not been able to find anything like it.
The chip itself is proprietary, no datasheet available for it.
...
0
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2answers
1k views
What is standard about standard cells in layout designing? [closed]
Why are standard cells called 'standard' cells? Why couldn't it be just cells? What is Standard about them? (I'm talking about the common terminology used in layout designing wherein the standard ...
0
votes
3answers
365 views
Design of 7400 Series IC
Why is pin number 7 GND and 14 VCC in 7400 ICs ( logic gate ICs) ? Could the designer have put VCC and GND in some other pin number? Is there a constraint for that specific number? (Except a few cases,...
0
votes
1answer
91 views
PN53x with emulate nfc
I saw that many of nfc reader/emulate based on PN53x chipset of NXP.
But the disadvantage of this chipset is , you can't emulate ISO14443-B
why is PN53x chipset ...
0
votes
1answer
71 views
GDSII stream reading
GDSII is a photomask\artwork format for photolitography. I am having trouble resolving a particular line in the file.
For example, 'SRefs' means it refers to one of the structures and uses this ...
3
votes
2answers
766 views
Is VHDL for digital circuits only?
Both Wikipedia and other SO questions about VHDL vs Verilog mention digital when describing VHDL.
Can you use VHDL to design analog circuits?
0
votes
1answer
111 views
How does the IC design process work? [closed]
Particularly for highly complex, digital ICs. Is it bottom up or top down? In particular, for top-down design designs the actual logic gates?
2
votes
2answers
307 views
What is the structural difference between a high-drive and a low-drive cell?
I've come across IC's that are labeled high-drive and low drive. I know that a high-drive IC has a higher intrinsic propagation delay but isn't as steep as a low-drive IC in function of the load to ...
0
votes
5answers
2k views
Difference between a memory cell and a memory chip?
I have gotten very confused on the fundamentals of computer memory in regards to memory cells and chips. I have been reading Assembly Language Step By Step Programming with Linux by Jeff Duntemann and ...
1
vote
1answer
137 views
Voltage conversion +1V to -3V inside a new IC design
I am looking for a good integrated CMOS solution for creating -3V out of a 1V supply. The -3V are just used for biasing and hence do not load the supply.
This means that the solution should be switch ...
1
vote
2answers
3k views
What does the “side-band” and “in-band” mean in the context of digital circuit?
I read below content from the Intel On-chip System Fabric (IOSF) spec. AS I understand, the IOSF is a technology for chip reuse and interconnect.
The sideband message interface covers most ...
3
votes
2answers
886 views
STM32 peripheral current consumption
I want to use a STM32F072 for a new product and saw table 35@page 65 in the datasheet.
This table lists the current consumption of several peripherals of the MCU.
I'm asking why relative simple ...
0
votes
4answers
164 views
Where to go with an idea for a chip? [closed]
I tinker with AVR, 6502 and z80 designs, just muck around really, nothing overly serious. But as a result I had a thought of an idea for a new chip.
Specifically a SoC built around a z80 core. But ...
1
vote
4answers
227 views
Is there an “additive manufacturing” method to make an ASIC?
Reading questions like this one "How much does it cost to have a custom ASIC made?", I was wondering if there's some sort of equivalent to additive manufacturing that would lower the cost to getting ...
0
votes
1answer
340 views
Most efficient circuit for 2048 Bit multiplication, and how to effectively render it
So this isn't for a hardware application, but I still think it will be extremely relevant to those that are chip designers/EE enthusiasts.
I'm attempting to do some analysis on multiplication viewed ...
1
vote
2answers
278 views
Chip Design Computer Generated Files for Fabrication Process
Could someone provide an overview of how the chip design files are used by the fabrication process? What I mean is once the design engineer(s) have completed the computer generated design blue print ...
3
votes
2answers
717 views
Power categories in ASIC design (Design Compiler)
I am currently working on the synthesis, with Synopsys' Design Compiler, of an AES encryption module.
In the power reports there are three power categories specified :
Switching Power
Internal Power
...
1
vote
2answers
133 views
how broad is the term “chipset”? [closed]
Can I use the term "chipset supplier" to refer generically to companies that provide packaged semiconductor chips?
Or, should "chipset" only be used to describe companies that manufacture a set of ...
4
votes
2answers
198 views
Kick-off Spread Spectrum Clocking
Need of SSC:
Spread spectrum clocking (SSC) is a special way to reduce the radiated emissions of digital clock signals. These levels or energy is radiated and therefore this is where a potential EMI ...
