Questions tagged [clock-gating]

The tag has no usage guidance.

2 questions with no upvoted or accepted answers
Filter by
Sorted by
Tagged with
1 vote
0 answers

Why AND-Latch based clock gate (ICG cell) is not reliable only when driving negative edge triggered FFs?

I'm reading the paper "A Novel Glitch-Free Integrated Clock Gating Cell for High Reliability" It says that with AND-Latch based ICG there could ...
spaul's user avatar
  • 249
1 vote
1 answer

Glitches in clock gating cell

how exactly does glitch happen for rising-edge and falling-edge ICG ? Why for the top version of rising-edge ICG, there is no X at the MSB of the latch output ? Note: TE signal is asynchronous to CLK,...
kevin998x's user avatar
  • 403