Stack Exchange Network

Stack Exchange network consists of 174 Q&A communities including Stack Overflow, the largest, most trusted online community for developers to learn, share their knowledge, and build their careers.

Visit Stack Exchange

Questions tagged [clock-speed]

Anything related to clock signal frequency (a.k.a. clock speed) issues in digital systems.

5
votes
4answers
639 views

Relationship between I2C drawn energy / power consumption and data rate

Referring to just what the I2C lines draw, am I wrong thinking that the higher the clock frequency the shorter the time there will be (the same amount of) current flowing through the pullups and thus ...
0
votes
1answer
36 views

Asynchronous FIFO in clock domain crossing

Clock domain crossing issue can be solved by using asynchronus FIFO with input frequency f1 is of the source domain and f2 is of the destination frequency. If the data is sent in bursts, depth can be ...
0
votes
1answer
47 views

Have I bricked my ATMEGA3328p by setting

I was playing around with setting the "system clock prescalar" (CLKPR). I'm now in a situation where I can see that the clock is 244.9KHz, using my logic analyser and the "Clock output on PORTB0" ...
0
votes
1answer
65 views

What are the advantages of a wider bus in comparison to those of a higher clock frequency? [closed]

The aim is to increase data transfer rate. I understand each may have some drawbacks and advantages. Frankly I'm not knowledgeable enough to know of many so I'd like some input from others. I know ...
0
votes
1answer
47 views

Slow clock speed with Atmega328P AVR microcontroller on breadboard

I have a small breadboard with an Atmega328p 28 pin microcontroller with a 16 MHz crystal and two 20 pF capacitors on it (similar to this demo: https://www.arduino.cc/en/Tutorial/ArduinoToBreadboard). ...
0
votes
2answers
43 views

Overclocking an image sensor for higher FPS

What happens if I overclock an image sensor? For instance the OV7670 (datasheet) which has a rated maximum system clock input (XCLK) of 24 MHz and maximum pixel clock (PCLK) of again 24 MHz. The ...
0
votes
2answers
63 views

ATmega 32 Clock Frequency Issue

I'm currently using ATmega32 device with external clock speed of 16 MHz . the problem when i use a delay of for example 16,000 ms in the software, it actually delays only a 1000 ms in actual world. I ...
7
votes
4answers
566 views

Exotic semiconductors for fast digital ASIC

I am researching exotic semiconductors for a digital ASIC with a few million logic gates which should run as fast as possible within a $30 million budget. (Specifically, I need to do a single fully-...
2
votes
1answer
70 views

Quartz Clock Accuracy

Do the vibrations of aircraft engines (or any engine, for that matter) dilute the accuracy of a quartz clock? I haven't done any kind of research or hypothesis testing, though I believe that the ...
1
vote
1answer
43 views

LCD SPI clock frequency with STM32L0 MCU

I'm designing a PCB that includes LCD Display NHD-C12832A1Z-FSW-FBW-3V3 (datasheet) connected to the STM32L071KZU6 microcontroller (datasheet). I'm afraid that the SPI interface of the LCD will not ...
5
votes
4answers
2k views

Is there a small (6-pin) DIP I can use to generate multi-MHz squarewave clocks with an external crystal?

I'm building a circuit that I'd like to run at 8 MHz to begin with, but I want to be able to try it out at 10, 12, 16, 20, and, maybe, 25 MHz. I know that many microcontrollers have the ability to ...
6
votes
5answers
4k views

Why are DIMMs not equipped with a heat sink like a CPU?

I know that a DIMM is composed of a set of chips that contain control logic managing the decode and prefetching memory operations. According to a product specification, I found that newer RAM works at ...
2
votes
4answers
169 views

Maximum Clock Frequency

As an assignment for the HDL course I'm taking, I've to design an FIR Filter. The module consists of two a small combinational circuit which can be used to reset the module, another combinational part ...
1
vote
2answers
124 views

How to set external clock value for STM32F1?

I creating a project with the microcontroller STM32F101C8t. This microcontroller has an internal clock of 36MHz. My question is how to correctly set the external clock value, ie what crystal value ...
0
votes
3answers
555 views

What is the fastest arduino to PC communication method?

I am making an application that has multiple i2c sensors controlled by an Arduino Uno. I want to get all of the raw data from the sensors and transfer them to a PC as fast as possible, on which I will ...
2
votes
2answers
399 views

Correct terminology for 'clock' that doesn't oscillate?

What would be the correct term for a clock input that isn't made to oscillate per se? In an attempt to only allow input A to have any effect on a circuit at a chosen time, one could AND it with ...
0
votes
2answers
37 views

High frequency clock from clocked RS latch

We were taught that this circuit is not of much use as when CLK=1, J=1 & K=1, Q toggles at a very high rate. So suppose I want to make a high-frequency clock, can I use this? Of course, the ...
1
vote
2answers
94 views

STM32F0x1 run SYSCLK at 1MHz with 8 MHz external crystal

I am using hardware with an 8 MHz external crystal and would like to reduce the SYSCLK frequency to 1MHz. I haven't been able to do this yet. Is it possible to achieve this with certain PLL and DIV ...
0
votes
2answers
89 views

Simplest shift register test circuit - clock

I'm looking for the simplest way to test the operation of a 74HC595 shift register without complex circuitry. Currently (on a breadboard) I have a 47K SIP resistor in a pull-up fashion connected to ...
0
votes
2answers
321 views

PLL vs Higher frequency crystal oscillator for fpga [closed]

I need 100MHz clock frequency to implement my HDL design on an FPGA. Is it better to use an FPGA board with 100MHz crystal oscillator or use PLL to increase the frequency? What are the advantages and ...
0
votes
0answers
36 views

Faster 8051 not taking the slower 8051 pin status correctly

I'm trying to do a rather simple data transaction between two 8051 microcontrollers using a variant of the SPI protocol. The large one is a slave and the small one is a master. The documentation for ...
1
vote
3answers
122 views

What determines the maximum size of a cpu cache?

Looking at a list of the very latest CPUs, I see several of them with a cache size of 12MB or 8MB - pretty small, when compared to the ever-increasing size of hard drives and ram. It seems to be taken ...
0
votes
1answer
133 views

Codec in 'master mode' require more than one external clock? (MCLK?) to drive I2S system timing to/from MCU slave?

Does an audio codec in 'master mode' require more than the one clock line (MCLK?) to drive and time I2S data sync to MCU or FPGA slave? I understand that the I2S proper consists of three lines - '...
2
votes
2answers
377 views

Why do micro controllers run @ 100's MHz whilst CPUs run @ GHz? [closed]

Whoopie - I've got a Raspberry Pi. When doing stuff it runs @ 1.2GHz and there are Uber overclockers out there who have boosted them to 1.5GHz (with phase change coolers). Today, the cheapest CPU on ...
0
votes
0answers
35 views

Programmable oscillator voltage spikes (DS1086)

I need a very precise clock for an application and thus picked up a programmable 5V oscillator: a Maxim DS1086. I programmed it to about 3.57 Mhz according to the datasheet and controlled the result ...
1
vote
1answer
70 views

Is it possible to connect eight digital inputs to a digital output? [closed]

Can eight digital inputs (at 20-Mhz) output to 160-Mhz? Does a multiplexer work for this? Thanks for your answers.
8
votes
2answers
891 views

Does a baudrate in serial communication (USB or RS232) need to be exact?

In serial communication, does the baudrate mean we have to use the exact clock speed or is it a range of speeds that we can use? and if it's an exact value, how exact should it be ? for example, can ...
1
vote
1answer
322 views

How to set ADC clock in low power mode?

I am measuring the voltage with the STM32L011K4 MCU. When the processor goes into low power sleep mode, I start reading the wrong values from an ADC. I think the reason is caused by the system clock ...
1
vote
2answers
795 views

Is there an ideal PCB trace width for data lines?

For a 1oz FR-4 PCB, is there an ideal PCB trace width for data lines? For power supplies, I realize wider is usually better, and power planes are preferred. But what about data lines? Is narrower ...
2
votes
1answer
116 views

STM32F746 Clock not reporting as expected

I'm using an STM32F746VGT6 microcontroller configured from STM32CubeMX for all the clocks and I'm getting roughly 220% higher clock rates when compiled. For instance I have an HSE crystal at 11....
3
votes
1answer
3k views

HSI and MSI - Applications of two Internal RC OSC in Microcontroller

In a ST microcontroller I'm using there are two OSC's that can be routed to exactly the same hardware and I'm wondering when you would use each one. Link to part documentation STM32L496ZG Excerpt ...
1
vote
3answers
2k views

How to configure Atmel SAM D20 for internal 48MHz clock source?

I try to run a Atmel SAM D20 MCU at 48MHz using the internal oscillator (OCM8M) and the digital frequency locked loop (DFLL48M). All I achieve is a deadlock of the processor, even I use a simple "...
1
vote
2answers
798 views

RPi GPIO speed issue in bare metal

After reading the excellent article on bare metal by David Welch (https://github.com/dwelch67/raspberrypi/tree/master/baremetal), a friend and I are trying to implement a simple GPIO toggle. It's ...
1
vote
2answers
814 views

FPGA maximum frequency : limiting factor

I would like to know which in general may limit the maximum clock frequency of a circuit implemented in FPGA. In the specific case I am building some FIR filters using Quartus and simulating them on a ...
24
votes
3answers
7k views

How is 255 Tbit/s processed in optical fiber communication?

I have never understood how the new record breaking data transfer speeds are achieved in terms of converting from/to electrical and optical signals. Suppose we have 255 Tbits of data and we want to ...
1
vote
2answers
135 views

How to theoretically determine max clock speed for a circuit?

I was wondering what influences the max clock speed and how to calculate it for a circuit implementation. Let's take a CPU for example: From what I understand the clock speed has to be choosen so ...
2
votes
4answers
86 views

Little change in Verilog module results in high change in power consumption (Synopsys Design Compiler)

I am comparing two Verilog designs: Design (1): A top module that is driven by a clock running at 50MHz, which is the main system clock. Design (2): The same top module as in Design (1) with one ...
3
votes
4answers
2k views

Is a 4/3 clock divider possible?

I have seen designs for digital clock dividers, which can divide a clock frequency by 1.5, 2.5, etc. But is it possible to create digital logic which divides a clock by 4/3? For example, if I have a ...
1
vote
2answers
4k views

Why are there 2 clock rates (core vs memory clock) in the GPU?

I learned at school that the clock rate inside a computer is the signal that keep switching between 0 - 1 (or active - inactive). There's also another delayed clock with the same frequency. These 2 ...
0
votes
1answer
49 views

How to calculate latency of integrated product?

Is there a standard model for estimating the additional clocking latency which needs to be applied based on product interconnects? For example: Lets say a DDR memory has a switching time of 1 ns. ...
3
votes
5answers
209 views

Why is modifying (by adding extra gates) clock inputs undesirable?

I am taking a course in digital electronics at university. I am second year mechanical engineering student, but I felt like it was important to understand some electronics. The lecturer in one of the ...
0
votes
4answers
764 views

How does VCO in PLL in computer processor work?

In todays personal computers and notebooks, what is usually used as a Voltage-Controlled Oscillator for generating clock signal for processor? Is that a crystal rather than RC circuit? Is it tuned by ...
0
votes
1answer
63 views

Timing specifications: can a spec be converted from units of +/- ms to parts per million?

I have a test specification that requires time base uncertainty of +/- X ppm or less. I understand that ppm is a common way to specify crystal accuracy. But in the performance specification for my ...
5
votes
2answers
423 views

Nanosecond interrupt accuracy on a 64MHz microprocessor

I am currently designing a PCB with a 64MHz nRF52832 bluetooth MCU. I have an interrupt connected to this MCU which needs to be detected with 1-3 nanosecond accuracy. Unfortunately, the 64MHz MCU has ...
3
votes
2answers
215 views

Does clock speed matter when recovering from I2C bus lock up?

When there is I2C lock caused by slave device driving the SDA line low you need to manually generate a few clock signals by doing a simple bit banging on the SCL pin. I thought that this need to be ...
1
vote
2answers
261 views

IS heat the only thing keeping CPUs from a faster clock rate? [closed]

Is heat the only thing that keeps CPUs from having a faster clock cycle or are there other limiting physical factors which keeps CPUs under 3~5GHz?
4
votes
1answer
531 views

What kind of use cases require a 2GHz, 4GHz, 6GHz, 30GHz or 100GHz oscilloscope? [closed]

I have been thinking of buying some oscilloscope for the work I do with Arduino. In my case it would be partly because of some usefulness and partly because it would give me a chance to learn an ...
1
vote
1answer
185 views

How do I calculate to get the correct timing for SPI

I am having an issue with sending the correct HEX registers over SPI to a slave device. I am finally able to see my issue by decoding the SPI using a scope. What I see is random HEX during my test. ...
3
votes
3answers
2k views

Computer clock technology?

Let's say I have a computer running at 4 GHz. I would say it means I need a way to measure increments of time of about 0.25 ns. How does a computer do that? My question is both: Technological: what ...
0
votes
1answer
146 views

What is the real speed of my system implemented on FPGA? How to check this value?

I created an FPGA system on ModelSim (a simple algorithm that calculate an equation and save on-chip), synthesized with Quartus Prime, then downloaded to my DE1-SOC. My intention is to compare my ...