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Questions tagged [clock-speed]

Anything related to clock signal frequency (a.k.a. clock speed) issues in digital systems.

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ATTiny85 clock speed problem

Using an ATTiny85 and an Arduino loader I created a simple device for turning on an exhaust fan based on a light sensor. The ATTiny85 turns on the fan after activating a warning light and sounding an ...
ArcZap's user avatar
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3 votes
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Increasing system clock frequency on STM32F303 drops I2C clock proportionately - why?

I'm trying to figure out a weird little issue I've discovered while debugging another element of my code. I've got a STM32F303K8 reading and writing to an I2C peripheral. The I2C clock speed is ...
pileunderflow's user avatar
2 votes
1 answer

PIC32MX can't get 80 MHz Clock from Internal RC OSC

I am using PIC32MX795F512L with the internal RC oscillator. By changing the settings of the config, I can get to 60 MHz max. But I can't get to 80 MHz. When I change the config for 80&#...
Uday Savaria's user avatar
1 vote
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How to determine the rise time to treat if the signal as a transmission line?

I know that If the length of the track is between 1/6 or 1/4 of the effective length of a feature like an edge a system can be regarded as lumped. BUT A a lot of times, the rise time cannot be taken ...
Knowledge's user avatar
  • 317
1 vote
1 answer

ATMega32u4 minimum system clock for USB 2.0

I am trying to cut down the power consumption for an ATMega32u4. The datasheet says, for USB 2.0 it needs an external clock, which it uses to generate a 48 MHz clock by multiplying the external clock ...
Dakkaron's user avatar
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How to set SPI clock speed for MT7623N

first I must say, I am new to the HW programming, but I really enjoy it. My first project is writing a library for MT7623N (BananaPi R2) that handles GPIO pins. I got the GPIO part done and I can set ...
h00ki's user avatar
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1 vote
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Impact of reduction on Dynamic energy and dynamic power in microprocessors

A microprocessor has been designed to have a dynamic switch which reduces power consumption when the loading reduces. Assuming a reduction of 20% in voltage reduces clock frequency by 20%. Calculate ...
Kriss Mutungi's user avatar
1 vote
1 answer

Codec in 'master mode' require more than one external clock? (MCLK?) to drive I2S system timing to/from MCU slave?

Does an audio codec in 'master mode' require more than the one clock line (MCLK?) to drive and time I2S data sync to MCU or FPGA slave? I understand that the I2S proper consists of three lines - '...
Bill Z2C's user avatar
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Why do we multiply the memory clock of GDDR5 by 4 to get the effective speed, when it isn't quad pumped?

GDDR5 is not quad data rate/quad pumped, but why, then, do we have to multiply the actual memory clock by 4 to get the effective speed? When you Google anything about GDDR5 and its effective clock ...
AdmiralSpeedy's user avatar
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How do I change and verify the clock frequency of Atmega4809 microcontroller? CLKOUT not working?

In the below code I am trying to get the clock frequency to show up on the CLKOUT pin which should be pinA7. But for some reason I don't get anything when measuring pinA7 on an oscillicope. I do see ...
Erv's user avatar
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How to manipulate timer registers of Arduino Uno?

I already asked about How to achieve high speed microstepping? I even used Arduino Due to achieve high speed. Practically there was no difference compared to Uno but by changing baud rate I could see ...
2012User's user avatar
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Why the assembly code does not match the number of cycles of ARM M4?

I ran the following C program on STM32F405 (ARM Cortex-m4). I tried to comprehend its computation period instruction-by-instruction. ...
Zachary's user avatar
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Faster 8051 not taking the slower 8051 pin status correctly

I'm trying to do a rather simple data transaction between two 8051 microcontrollers using a variant of the SPI protocol. The large one is a slave and the small one is a master. The documentation for ...
Mike -- No longer here's user avatar
0 votes
1 answer

How to calculate latency of integrated product?

Is there a standard model for estimating the additional clocking latency which needs to be applied based on product interconnects? For example: Lets say a DDR memory has a switching time of 1 ns. ...
Zephyr's user avatar
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How to know the speed and energy of a particular Digital Design in Quartus-II and DE1-SOC FPGA (Altera)

I did a digital design in Quartus II and my board DE1-SOC FPGA, now I want to read 3 factors: general speed that digital design takes to finish the application, area of the design if it would be a ...
sujeto1's user avatar
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Difference between Clock and Operating Frequency

I am very new to embedded world. I am trying to design a transreciever system based on RF MCU. I am looking at ATMEGA64RZAV-10PU from Atmel. The datasheet says the clock frequency as 10MHz but ...
niki_t1's user avatar
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How much does the clock drift for the Arduino Pro Mini board?

How much does the clock drift (at most) for the Arduino Pro Mini board? I don't need to correct it on the board, just need to know the specifications, such that I can take the necessary precautions ...
Clausen's user avatar
  • 103