Questions tagged [clock]

A digital signal that goes high and low at a specific frequency.

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-2 votes
1 answer
75 views

RC circuit oscillator [closed]

I want to make a simple RC oscillator circuit that produces waveforms of How can I do so?
0 votes
1 answer
29 views

How can I convert a stim signal from analog to digital?

I want to get a digital signal from dstm1,2,3,4, but I can't. What's the problem?
0 votes
0 answers
26 views

How can I change digclock signals from analog to digital?

I want to get a digital singl from dstm 1,2,3,4. but it didn't work. runing time is 8.5ms The simulation results from analog are similar to the results that you want to see as digital signals. But, ...
0 votes
0 answers
45 views

Circuit for swinging pendulum on clock

I have a large (30”) statue that holds a clock that swings. The pendulum has a small circuit that is powered by a 1.5 V C battery. It stopped swinging even with a new battery. The circuit has two ...
0 votes
1 answer
439 views

Poor man's clock MUX with an LVDS input

I want to send two different 10MHz clock signals to a device. My board have tight volume and power constraints and I would rather not use a complicated clock buffer/PLL/MUX IC. The first source have ...
2 votes
4 answers
89 views

Can slower switching edges worsen the EMI behavior?

A common method (as stated in many electronic design articles/books) to reduce EMI (radiated emissions) of any fast switching circuit is to slow down it's switching edges (reduce tr/tf). This ...
0 votes
2 answers
69 views

STM32H7 not utilizing the 480MHz PLL clock

hope y'all are doing well. I am currently trying to get my STM32H753ZIT6U to 480MHz as its the max clock frequency it can achieve, however when doing the procedure to change the frequency I am not ...
1 vote
0 answers
58 views

How to generate 3 pulses of varying lengths with an FPGA and Verilog?

I am trying to generate 3 pulses of 2 different lengths at specific times using an Arduino MKR Vidor 4000 which has an Intel Cyclone 10 on board. I need to generate one pulse with 5 µs length followed ...
-1 votes
0 answers
38 views

MII Clocks vs RMII Clocks [duplicate]

This is a duplicate question of this. However, I was not able to understand the accepted answer on why MII needs two clocks whereas RMII required only one. Can someone please explain the difference in ...
0 votes
1 answer
220 views

Changing frequency of input clock port (FPGA)

I', using xilinx ultrascale FPGA (xcku025-ffva-1-a) I am referring to application notes provided by xilinx. I am going to use the reference code provided in xapp1315. In this reference code, an ...
0 votes
0 answers
34 views

CD4059 behavior with invalid jam inputs

I am currently working on a circuit for a electronic synth module that should function as a random clock generator. My idea is to use a high frequency clock (relatively speaking for musical ...
0 votes
2 answers
100 views

Is it possible to use Si5351 to replace a crystal oscillator on a computer?

I have an old Macintosh IIfx and it originally runs with 80 MHz DIP-4 crystal oscillator (CPU speed is half of this, so 40MHz). So far I have used 100 MHz crystal oscillator to overclock without ...
1 vote
0 answers
25 views

Signal not Showing State Changes on Intergrated Logic Analyser (Vivado)

I have been using the Integrated Logic Analyser (ILA) on Vivado 2021.2 to log some signals from a RISC-V processor running on an FPGA (BASYS 3 FPGA development board). The signals I am monitoring are ...
-1 votes
2 answers
37 views

What are the xtal pins for esp 12E

What are the xtal pins on esp 12E? I couldn't find where to hook up the crystal in the datasheet. Thanks.
0 votes
1 answer
255 views

ATtiny13 at 16MHz? Why not?

How exactly are you supposed to run the ATtiny13 at 16MHz or higher if you really have to? What is the method and what external circuitry do you need to add? Is it altogether more hassle than using ...
0 votes
2 answers
37 views

STM32H750IBK6 SDRAM FMC CLK maximum frequency

In the STM32H750IBK6 REV V, what is the maximum FMC_CLK to run SDRAM? The datasheet has two different values (for the rev V and rev Y IC revisions). What is the safe area of operating FMC CLK with ...
1 vote
1 answer
1k views

STM32L4 Clocks Configuration

Does anyone know of a code template to properly configure clocks, PLL, latency, etc. for the STM32L4x parts? I'm using a NUCLEO board with this part (L476RG) and have struggled for days with the ...
1 vote
0 answers
50 views

Minimum MCU clock frequency to process an analog signal with a max. frequency component of 50 kHz

An MCU requiring 4 clock cycles to process a sample has to sample an analog signal having a maximum frequency component of 50 kHz. What should be the minimum clock frequency of the MCU? This image was ...
1 vote
1 answer
250 views

SI5351 I2C clock generator breakout board not detected on raspberry pi 3

I've recently bought a SI5351A I2C breakout board on Aliexpress (This listing) for a project. I was trying to test the board using a simple breadboard, a couple of jumper wires and my raspberry pi 3 (...
1 vote
1 answer
167 views

Generating sine wave from noisy pulsed signal

I have a pulsed signal approximately 80MHz, 40mV amplitude. I need to create a clock signal for an ADC which requires a phase locked sine wave of about 0.5Vpp. Is there a simple COTS solution for ...
6 votes
5 answers
3k views

What happens if clock cycle is replaced with constant high voltage in a processor?

Would the data in registers change at light speed and maybe become unstable/undefined, or would the processor stop changing state altogether? This post says: To give all the gates time to change ...
0 votes
1 answer
78 views

How to generate a clock signal using an op-amp

I am trying to build a circuit which toggles a lamp on and off. I am using a JK flip-flop for the toggling action. I want a clock pulse of 1 Hz. I know there are many ways to generate a clock pulse, ...
1 vote
1 answer
52 views

How is this bit of logic generating its short output pulse (and is it supposed to be longer)?

I'm debugging a 1970s bitmap video generator board, and potentially among other issues it's not syncing happily to the old B&W video monitor I'm using (which is quite forgiving). The NTSC video ...
0 votes
3 answers
755 views

How to limit the output voltage of a TCXO?

I am using an SiT1552 MEMS TCXO providing 32.768 kHz. It will be sourcing two ICs: a microcontroller and a DA14580 Bluetooth Low Energy transceiver. The ICs and TCXO are all powered by 3.3V. The TCXO ...
1 vote
1 answer
463 views

Timing constraints for forwarded generated center-sampled clocks

Problem Description I am trying to figure out the "correct" way to constrain (in .xdc format - this is in Vivado) a forwarded source-synchronous clock that is generated (by division) from ...
1 vote
1 answer
132 views

Crystal oscillators of an STM32 microcontroller board

I have the STM32F302R8 MCU board.l Its user manual is here. There are two crystal oscillators on the board. X3 is missing and X1 seems to be used for the small debugger microcontroller (circled in ...
1 vote
1 answer
2k views

Generate clock jitter in a testbench

How would you generate clock jitter in a testbench? I have seen these two ways, but I am not sure if they are the best ways: ...
0 votes
0 answers
58 views

Can a CD40110 start counting from 1?

I have a small assignment to made a century clock (which includes year, month, day, hour, minute, and second) without using a microcontroller. I decided to use a CD40110 to drive a common-cathode 7-...
1 vote
3 answers
152 views

How synchronous can a number of electrical clocks in separate devices remain? [closed]

Imagine we have 5 circuits/devices and in each we have an electrical clock that generates a pulse (for example with a constant frequency of 100 Hz or 1 kHz). In the beginning we have wired all the ...
0 votes
2 answers
155 views

Does an ISP clock interfere with the on-board clock when programming via ISP?

I am planning to use ISP programmer to program my new AVR board. I use an 8 MHz crystal on my PCB to clock the micro (atmega328p-au). Now, as I understand the ISP programmer will provide its own clock ...
5 votes
2 answers
239 views

Are electrical clocks influenced by vibration?

There are many different electrical clocks for generating pulses with constant frequency (e.g. RC oscillators, crystals, OCXOs, MEMS oscillators, chip-scale atomic clocks). If they are mounted on a ...
4 votes
1 answer
176 views

MachXO2 DDR and PCLK routing issue

I'm doing a project in which I use DDR interfaces to transmit and receive data between different FPGAs. The FPGA transmitter will send data at 125 MHz and the receiver will use 250 MHz to sample the ...
0 votes
0 answers
23 views

Is there any way to periodically cut off/ground (to 0 V) an input signal without using a clock signal?

I'm trying to periodically (it doesn't have to be accurate/precise or be in the same intervals every time) cut off/ground (make it 0 V) an input signal in a digital logic circuit without using a clock,...
0 votes
1 answer
930 views

4-bit memory serial to parallel memory register circuit question

I am building a 4-bit serial to parallel memory register and I feel like so far I have gotten things right, but I'm unsure of where to connect the CLR connections. Could someone have a look at my ...
0 votes
1 answer
360 views

Logisim flashing button

How can I create a button with a clock that is connected to a LED so that the LED turns on when the button is pressed, but if you keep holding it it will turn off?
1 vote
0 answers
36 views

Vivado timing setup problem

I have a pipelined datapath I made in class that I would like to put into another project to make an SOC. In the original Vivado project I created it in, the datapath can be implemented with a clock ...
2 votes
1 answer
98 views

Reliability issue of HMC833 PLL

We are using an HMC833LP6GE PLL in our design for generating 122.88 MHz from a reference of 100 MHz. We are feeding a reference signal of >5 dBm. What we are observing is that out of 10 times, if ...
3 votes
1 answer
633 views

Crystal reference and capacitors for w5500

I'm selecting the caps for the crystal oscillator of the wiznet W5500. The standard Load Capacitance for 25Mhz crystals is 18pF. I found out that the hardware guideline claims for a Load Capacitance ...
2 votes
1 answer
428 views

How to generate a continuous clock from one that periodically turns off?

I have a LVDS clock signal that is gated about ever 30us. This is a MIPI D-PHY clock that switches from HS mode to LP mode when the data lanes go to LP mode (and are auto-clocked). The problem is that ...
0 votes
1 answer
36 views

Question regarding the CLKIN input of the Skyworks Si5351C clock generator

I'm planning to use the Skyworks Si5351C clock generator. It has a CLKIN input, which, according to the datasheet, is for the "external clock reference". I have 2 questions regarding this ...
-2 votes
1 answer
1k views

What is the XTAL clock used for in an 8051 microntroller?

I'm trying to design an 8051 microcontroller circuit which uses timers/counters, and the circuit I'm using for inspiration uses a clock generated using the XTAL1 and XTAL2 pins of the IC, shown in the ...
0 votes
1 answer
651 views

VPX radial clock vs bussed clock

I'm learning some concepts about OpenVPX. One thing I am a bit confused about is the notion of a radial clock versus a bussed clock. I'm not getting many helpful Google hits. Can someone explain the ...
0 votes
0 answers
52 views

Why do we multiply the memory clock of GDDR5 by 4 to get the effective speed, when it isn't quad pumped?

GDDR5 is not quad data rate/quad pumped, but why, then, do we have to multiply the actual memory clock by 4 to get the effective speed? When you Google anything about GDDR5 and its effective clock ...
0 votes
1 answer
254 views

Synchronizing a clock enable signal with an input clock

I'm designing a basic PCB for testing equipment in lab. The goal is to take a clock input, a clock enable (from a PC indicating that the measurement is beginning), and then distribute it to a number ...
0 votes
1 answer
201 views

Doubt regarding static timing analysis - setup time check

I was reading J.Bhasker's STATIC TIMING ANALYSIS book. In that book, he tells that when launch flip flop launches the data & while capture flip flop is capturing data, he says that We now ...
1 vote
1 answer
61 views

Clock issue or set-reset issue: I am unsure how to debug and assess the situation

I currently have two issues I'm not sure how to deal with, and I am unsure of which is preventing implementation. I am trying to debug a memory interface and I am unsure of what to do. My first ...
-1 votes
1 answer
93 views

I burnt a resistor from the output of a crystal oscillator and am confused why

I have this 40 MHz crystal clock connected to this IC. QC_FCK0->FCK0 and QC_FCK1->FCK1. Resistors are 1 M Ohm and capacitors are 18 pF. I am not used to dealing with clocks, and am confused why ...
2 votes
1 answer
79 views

Possible to program a PIC18F over ICSP without serial clock?

I'm playing with a device to see if I can program the PIC with my own code. There is a header and I've traced the pins to the PIC18F, but I notice there is no pin on the header that corresponds to the ...
0 votes
1 answer
109 views

Need to build a counter circuit using D-type flip flops [closed]

I can only learn by examples it seems. I feel I've understood my classes well... but I cannot for the life of me decide where to begin, or link my understanding to anything practical right now. I need ...
5 votes
0 answers
116 views

Clock generator output off by a factor of sqrt(2)?

I'm using the Si5351A-B-GM clock generator with the NX5032GA-25.000M-LN-CD-1 (25 MHz, 8pF) crystal. The fragment of the schematic is shown below (the rest of the schematic omitted for clarity): ...

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