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Questions tagged [cmos]

"Complementary Metal-Oxide Semiconductor" is a process which implements a combination of PMOS and NMOS transistors. Most current digital logic is implemented in CMOS. Its cost-effectiveness due to being so widespread means many other applications have become common as well, such as in analog design, image sensors, telecommunication, etc.

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How are CPUs designed?

I've started playing with electronics a while ago and making simple logic gates using transistors. I know modern integrated circuits use CMOS instead of transistor-transistor logic. The thing I can't ...
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What' so great about CMOS?

I've read lot of topics here. I read some people saying I prefer to "have CMOS characteristics" & so on , also in some data sheets (like AVR), they say it have CMOS characteristics, etc... I ...
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381 views

Safely connecting 4056 and MSP430

I'm using MSP430G2553IN20 microcontroller on LaunchPad to drive an 4056 chip (HCF4056B to be precise) and a 7 segment display. The 4056 is set to sink current. I've connected the port 2 pins, set as ...
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2answers
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What is the fastest 7400 series family? Is 74VHC faster than 74AHC?

What is the fastest 7400 series logic family? Is 74VHC* faster than 74AHC*? This list does not seem to be in any particular order: http://en.wikipedia.org/wiki/7400_series
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1answer
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Silicon Controlled Switches: applications&suppliers

I came across this description of what are called "silicon controlled switches." I always look to balance n/p-channel electronics for stability, and using these silicon controlled switches seemed like ...
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2answers
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Atmega8 input impedance

What is the Atmega8 input impedance. I want to add a push button to an Atmega8 and my configuration would look something like this: A +5V source, resistor, push button not pressed goes to Atmega8, ...
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5answers
4k views

Differential amplifier - what is the differences between CMRR and CMR?

I know that CMRR is Common-Mode Rejection Ratio, but what is CMR? $$CMRR = \dfrac{A_{dm}}{A_{CM}}$$ I didn't find any mention of it in Sedra & Smith bible. Does anyone know what CMR is?
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How do I set the speed of a 4060B chip?

Apologies if this is a bit simple, but I'm new to this! How do I set the speed for a 4060B chip? I want it to trigger every 5 minutes (fairly accurately). I've looked at the instructions here: http:/...
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4answers
857 views

Reliability of anti-static packaging

OK, DILs are on the way out, but from time to time you still can see CMOS DILs packaged like this as ESD protection: That's aluminium foil on EPS (expanded polystyrene). The EPS isn't conductive, ...
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3answers
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Going from Transistors to Gates to…IC's?

So I am trying to understand I guess what is probably a basic concept of computers. I was taking a look at this previous question: From Transistor to Gates And it's accompanying link: http://www.cs....
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3answers
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Will cutting power to a CMOS chip effectively remove it from the circuit?

I have some designs that require several 4017 ICs to be switched in and out of the circuit intermittently, for counting circuits that require more than 10 outputs. The way I am currently designing ...
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3answers
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Do I need to duplicate the 4th “substrate” connection when building CMOS gates out of discrete transistors?

All CMOS digital integrated circuits I've ever seen connect all the nFET substrates together to GND. In particular, the IC CMOS NAND gate has one nFET that has its substrate connected to GND, but its ...
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3answers
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Understanding CMOS performance and complexity for ASIC : 350nm to 45nm process

I am trying to build an ASIC chip with the help of the MOSIS project. (They make it cheaper by combining multiple small project into a single fab). I have a choice between 350nm to 45nm, and ...
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3answers
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Equal rise time and fall time in CMOS circuits

For the design of digital CMOS circuits, there is a need to ratio the PMOS and NMOS transistors so that the worst case rise time and fall time on the output are equal. Why is this a crucial ...
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2answers
298 views

Why do MOFET need so many contact windows?

I don't understand these sentences from Razavi's book, Design of CMOS Integrated Analog Circuit, 'the gate polysilicon and the source and drian terminals are typically tied to metal(aluminum) that ...
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Voltage at what Amperage

I've often seen devices with power requirements specified only in Volts (e.g. 7-12V) but never the amperage. I've wanted to run various embedded devices of wall warts and batteries (the devices have ...
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1answer
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IC Design Resources

Looking for some resources on the design of Integrated Circuit Designs as they can contain a range of components. I am interested in how they can produce diodes and resistors on the dies in the ICs. ...
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Convert fan-in-2 fan-out-3 NAND gates to FO4

This question is about gate delay in VLSI (microchips). (Yes, it is a CMOS) Every digital chip consists of 2 kinds of elements, Register Logic (trigger or latch stations) and combination logic (...
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2answers
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CMOS (or CMOS compatible) shift register with latched open-drain outputs

I've been looking for a 3.3V compatible shift register (SIPO) with latched open-drain outputs. I've settled on a 74xx596 (not a '595!), but of all the 74xx CMOS series I've been looking at omit this ...
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1answer
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Difference between CD4017 and CD4017B

I have a choice between a CD4017 and a CD4017B. I've also seen CD4026 and CD4026B. What is the difference between these - is it a silicon revision or do they have different functionality?
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Tiny 8MSPS DSPs?

I have a problem: I've got five tiny CMOS image sensors (2mm x 2mm), each in a small space (about 10mm x 15mm). They take a clock signal in, and output an analog signal, requiring an 8MSPS ADC each. ...
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“Tristate a pin”

What does it mean to "tristate a pin" on a CMOS microcontroller?
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In theory, is it possible to make a logic gate that uses zero current?

CMOS greatly reduces the current draw of ICs because one of the complementary FETs is always in the non-conducting mode, so there is only a flow of current during the transition between states, which ...