Questions tagged [cmos]

"Complementary Metal-Oxide Semiconductor" is a process which implements a combination of PMOS and NMOS transistors. Most current digital logic is implemented in CMOS. Its cost-effectiveness due to being so widespread means many other applications have become common as well, such as in analog design, image sensors, telecommunication, etc.

1
vote
1answer
205 views

How could I put an Enable pin on a standard two-stage CMOS op-amp?

I need to design an LDO regulator that only sources supply voltage and current to the load whenever it receives a logic-1 signal. Since the main element used in the LDO regulator is a differential ...
0
votes
1answer
71 views

Dynamic power dissipation of a Cmos inverter with relation to it's geometry

I know that the dynamic power dissipation of a CMOS inverter is defined by the equation: Pd = (Cl)(Vdd^2)(fb). My teacher challenged us to find ways to reduce power dissipation besides the obvious ...
0
votes
2answers
121 views

Why do we measure \$I_{ds}\$ for CMOS instead of \$I_{sd}\$?

The standard way to write current across a MOS seems to be along the \$I_{ds}\$, i.e. from drain to source. Why don't we use \$I_{sd}\$ instead? I understand both ways are equivalent, but would it not ...
0
votes
1answer
61 views

How to send to pulses to a CMOS Counter

I have tried to find answers to this many times, and the only solution I have been able to find is having two 555 Timers (or a 556) one in astable, and one in monostable. I could easily do this with ...
0
votes
3answers
118 views

1Hz pulse generator - LVCMOS 1.8 output

I am pretty new to electronic design so sorry in advance if the question is too naive. I need to build a small portable 1Hz pulse generator and connect it to a FPGA input pin, configured in LVCMOS 1....
0
votes
1answer
34 views

Deriving the Transistor Width for NOR

I'm an undergraduate electrical engineer and my universities notes are not the best, I have an assignment in which I do not want the answers to but the question has given me the oxide capacitance, ...
0
votes
1answer
302 views

Why not switching extra inverters with opposite MOSFETs in CMOS XOR gate?

Below you can see a CMOS XOR gate. I wonder why we do not change extra inverters like A' or B' with opposite MOSFETs. For example, could not we just put the green construction in the place of red ...
0
votes
4answers
444 views

What is the use of pull-down networks in CMOS gates?

Below you can see the basic CMOS inverter. What I don't understand about this particular design is the purpose of the n-channel mosfet which is the part referred as pull-down network. What if we ...
4
votes
5answers
635 views

How necessary is ESD protection, really?

I'm not asking about manufacturing. I'm asking about designing electronics to survive normal use in the field. I want to figure out just how necessary it is to include TVS diodes in my design. As I ...
-1
votes
2answers
61 views

How did we find Vin in this CMOS?

Why did the lecturer decided that Vin is vGSn - vGSp + vDD , Why did he not go through the drain path and used vGDn and vGDp ?
1
vote
2answers
209 views

what logic family does tri state logic fall into?

Here is a good Wikipedia on logic families. This seemed like a particularly important line. Of these families, only ECL, TTL, NMOS, CMOS, and BiCMOS are currently still in widespread use. I'...
0
votes
2answers
86 views

Unexpected Behavior of a MOSFET Two Stage Differential Op-Amp

Trying to come-up with a basic default MOSFET-transistor amplifier simulation (for educational purposes). I don't get something. In the simulation below "out" is -1.84V while I expect something more ...
0
votes
2answers
58 views

Are D flipflop inputs and clock thresholds the same for a given logic family?

I'm using an SOIC20 74ACT574 octal flipflop in a design. Vcc is 5 V, and GND is 0 V. The datasheets give V_IH (logic high input, guaranteed minimum) as 2.0 V and V_IL (logic low input, guaranteed ...
2
votes
2answers
84 views

MOSFET Terminals in Layout

I am currently doing layouts in CMOS VLSI Design and I have gotten to drawing stick diagrams. The schematic of the 2 input NAND gate is shown below. In drawing the layouts I have trouble deciding ...
0
votes
1answer
1k views

Can I create a CMOS AND gate with 2 serial n-type and 2 paralel p-type CMOS transistors?

So I know that a CMOS AND gate is made with 2 parallel p-type transistors and 2 serial n-type transistors and an inverter on the output. But can we just make the AND gate similar to the NOR gate -...
0
votes
2answers
330 views

How to detect pulse duration with cmos circuit

I have created a circuit where I want to detect a pulse width , but unfortunately I can't get what I want. I think my circuit is totally wrong, I am looking online to find a solution, but the closest ...
0
votes
1answer
273 views

Cascode Amplifier vs Cascode Amplifier with CMOS current source

So I studied the gain cascode amplifier as follows, I understand that the gain for this circuit is approximately -(gmro)^2 Now, here is a different circuit using the cascode amplifier but instead of ...
1
vote
0answers
62 views

Is a cascode better current source than current mirror ? Which option is better?

I have simulated a cascode and made a M2 in saturation so it will act as a current source. I want to understand which current source is better. Is cascode better because it has a higher output ...
-1
votes
2answers
93 views

How Vdc and M1 are influencing the circuit in this voltage controlled oscillator

I have simulated a VCO and I want to understand the difference between the ring oscillator. In this case I have a higher frequency than in ring oscillator with same parameters of transistors. I ...
0
votes
1answer
267 views

How to increase the gain of Operational transconductance amplifier by changing the sizes of transistors.

Here is the schematics of the OTA. By changing the length of the transistors I am having more gain but I cannot reach the gain of 200. The maximum gain I reach is 110.35. I want to reach the gain of ...
0
votes
2answers
168 views

What determines the frequency of the oscillator?

I want to understand what determines the frequency of this ring oscillator and how to lower the frequency.
8
votes
5answers
3k views

Is the NAND logic gate perfectly symmetrical?

In other words: if we swap A and B, will Q behave exactly the same in DC and transient analysis?
4
votes
2answers
275 views

Finding Rout of differential pair with active current mirror (from Razavi's “Design of Analog CMOS Integrated Circuits 1st Edition”)

According to Razavi, \$R_{out}\$ is approximately \$r_{o2}||r_{o4}\$: I get the same answer (assuming \$2r_{02} >> \frac{1}{g_{m3}}||r_{o3}\$): But how did he get equation 5.27? In particular, ...
0
votes
1answer
66 views

How can I find the equivalent resistance, Rxy, of the two NMOS transistors in Figure 5.25 in Razavi's “Design of Analog CMOS Integrated Circuits”?

While calculating the gain (\$-G_mR_{out}\$) of the differential pair (with active current mirror), in order to find \$R_{out}\$, how is Razavi able to substitute M1 and M2 with \$R_{xy}=2r_{01,2}\$?
0
votes
1answer
1k views

What is happening when I am adding a load capacitor in CMOS inverter

I want to simulate an invertor with CMOS. When I added a load capacitance and plotted the output voltage. I saw a sharp voltage graph so I have changed the dimensions of the transistors and got the ...
0
votes
1answer
314 views

Applying negative voltage to CMOS chips

I have a situation where it's possible a negative voltage may appear on the power supply rails driving CMOS chips. The negative voltage will be very limited in current, fed through a resistor. The ...
0
votes
1answer
409 views

Current and Voltage in CMOS Logic Gate

So, in the NAND gate below, I understand how it works with the p-type and n-type transistors. However, my question is what happens with the current when the output is connected to Vdd? If the voltage ...
2
votes
1answer
974 views

CMOS Integrate circuit with output in Open Drain Technology

I can't understand a thing from my book, it say that since in integrated circuit with CMOS have an output of high and low current that is equal we can't use the wired-or connection, but we can use it ...
4
votes
4answers
554 views

Determining Operational Amplifier Offset Voltage

I am designing two stage operational amplifier in CMOS technology. After sizing all transistors and preeliminary checks I wanted to determine input offset voltage of my circuit, and browsing many ...
0
votes
1answer
38 views

Can power specs be used without extending the margin to account for losses?

Looking generally at the 74FCT family, I saw that it's power pin should be held at \$5V \pm 5 \%\$ to be in specs. From my understanding, \$\pm5\%\$ power supplies are widely available, but are the ...
1
vote
1answer
92 views

Absolute maximum ratings interpretation

I have a datasheet of a CD74HCT86E XOR gate. Under Absolute Maximum Ratings, it says DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . ....
1
vote
3answers
261 views

4069 envelope follower

I am trying to build this envelope follower: And I haven't been able to get it to work. Without any inpt signal, I'm getting a constant voltage at pin 6 (just before the 1k resistor and LED) and even ...
0
votes
1answer
94 views

Searching for root cause of TC4422A failure

I'm working with a device which employs the Microchip TC4422A to drive a series LCR load in the low kHz range, PWM, 50% DC. The device actually has several of these driver circuits, for several loads, ...
1
vote
4answers
294 views

Shifting a 2.7V digital signal to Arduino logical levels?

I'm pretty much a beginner in electronics and I'm currently working on a personal project, where I have a device, that is putting out a digital signal (square wave) that goes from 0V - 2.7V and I need ...
2
votes
1answer
152 views

Practical ESD protection without latchup

My understanding has always been that any CMOS I/O pin needs external ESD protection - since the on-chip protection diodes are only there to guard against ESD events during manufacture handling. ...
-1
votes
1answer
77 views

Having trouble understanding CMOS and PMOS circuits [closed]

I'm in a digital logic class and I've got a solid grasp on Boolean algebra, SOP, POS, NAND, NOR gates, etc. Now I'm having trouble in understanding what NMOS, PMOS and CMOS transistors are and how ...
2
votes
1answer
60 views

Can a Z84C00 CPU directly drive 74HCxxx series logic?

I'm getting confused by the datasheet for the Z84C00 CPU, while trying to work out if I can use it to drive 74HCxxx chips, or if I need TTL-compatible logic (i.e. either 74HCTxxx or 74LSxxx). It's ...
0
votes
0answers
207 views

Driving transistor with the output of CMOS inverter [duplicate]

This is kind of a follow-up question to my last question (CMOS inverter configuration). I have succesfully used an Arduino digital output pin. The output pin drives IN1 and IN3 inputs of an L298N ...
2
votes
0answers
267 views

L298 distorts signal

I connected STM32 F334R8 microcontroller to L298 H-bridge. I made some measurements. The problem is output signal on L298 has quite slow slopes and is not as sharp as input signal. I do not understand ...
0
votes
1answer
91 views

Correct configuration for CMOS inverter

I need to get 4 outputs from a 5V digital output as follows: 2 of them inverted and 2 of them non-inverted. I thought about using a 74 HCT 04 hex inverter in the following configuration: simulate ...
0
votes
2answers
341 views

4-terminal MOSFET in this CMOS circuit

The question is which logic function does this circuit implement if A and B are input and Y is output? I'm not familiar how 4-terminal MOSFET works but trying to solve Y using A=0 B= 0 The abovest ...
0
votes
2answers
367 views

Depletion mosfet inverter

I know that if both transistor in a cmos inverter are enhancement then the output will be as shown in the figure: But I wonder, what if one of them is enhancement and the other is Depletion?
3
votes
1answer
92 views

How would you size the transistors in this problem?

I know that whenever you have series transistors multiply the equivalent W/L of the inverter by the number of series transistors. In the parallel case W/L remains the same. I don't know how to apply ...
0
votes
3answers
71 views

cannot figure what is the gate for this CMOS realization

i tried the to figure the what is this gate but i coud not it seems to pass one or high impedance on positive clock depending on the input and zero or high impedance on negative clock put i can't ...
-2
votes
2answers
215 views

Bidirectional TTL to CMOS

Is there a way to have bidirectional ttl logic levels to cmos logic levels conversion in a unique IC. Because right know im trying to create a z80 computer but using a avr as a peripheral as serial ...
0
votes
1answer
127 views

CMOS source follower with 2 in series

I am really struggling with where to start to analyse this. Using the Shichman Hodges Model and the small signal equivalent circuit, the voltage gain can be equation can be seen to be vo = -gmvgsr0. ...
1
vote
1answer
1k views

What is feedthrough in vlsi standard standard cell library gates?

I come across with the term feedthrough in standard library cells, but i did not understand its function.
0
votes
2answers
164 views

Dynamic Voltage controlled Capacitor

I need a sinusoidal varying capacitor to test a differential capacitance circuit. I will use the circuit to test MEMS gyroscope/accelerometer capacitance change. But right now I do not have the ...
0
votes
1answer
57 views

Is the infrared sensor fabrication process(Using such materials HgCdTe, InSb, InGaAs) different from CMOS fabrication processes ?

I want to learn differences between Infrared sensor fabrication and standard CMOS IC fabrication. If I am not wrong, in standard CMOS fabrication Silicon is mostly used. But for infrared spectrum such ...
0
votes
1answer
131 views

What is the difference CMOS and CCD image sensors? In terms of Infrared spectrum [closed]

What is the difference between CMOS and CCD image sensor arrays? i.e working principles. Please consider in infrared spectrum. Which one's fabrication is expensive/ or cheap ? Which one gives ...