# Questions tagged [cmos]

"Complementary Metal-Oxide Semiconductor" is a process which implements a combination of PMOS and NMOS transistors. Most current digital logic is implemented in CMOS. Its cost-effectiveness due to being so widespread means many other applications have become common as well, such as in analog design, image sensors, telecommunication, etc.

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### Minimum number of complementary CMOS to implement $F=ABC+\overline{(A+B+C)}$?

Minimum number of complementary CMOS transistors pair will be required to implement function,$F=ABC+\overline{(A+B+C)}$ are? $(A)6$ $(B)7$ $(C)8$ $(D)9$ I tried like ...
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### Given a pull-up network, draw the complimentary pull-down network (CMOS gates)

this is for my computer organization class (I am a CS major), but I figured this post belongs better here than on stackoverflow. I am asked to draw out the complimentary pull down network for the ...
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### How to find power efficiency in DC-DC converter circuit

We are currently simulating a dcdc converter called the LTC3108. The input voltage is 500mV and the output is 3.3V through the dcdc converter. Here we have to calculate the efficiency of the circuit ...
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### Another solution for all MOS are in cutoff saturation region

Here is a two stage amplfier with a beta multiplier bias(lab3),the schematic of lab3 is in the second picture. I simulate them when VDC is 1.8v and 1.98v for tt-corner and ff corner in 25 degree ...
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### Need help understanding a fairly vague solution to example problem (the topic is noise in CMOS circuits)

So I have the solution to the following example problem I am working on: Now the issue is that I am trying to understand the solution I was given: The thing is this solution is simply quite vague. ...
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### Question on feedback (the topic is in CMOS circuits)

So right now I'm studying feedback in CMOS circuits (i.e. when there is some sort of connection between the input and the output like in the picture below): Now during the next step in the example I ...
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### How CMOS transistors might be used as a capacitive sensor for biopotential?

I was wondering how CMOS-based capacitive electrodes might be designed (e.g. in this article I stumbled on). It seems to me, that it would make sense to capacitively couple the input of the transistor ...
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### What is the significance of FO4 inverters in CMOS static circuits?

With regards to the image above, I wanted to know what is the importance of Fan Out of 4 (FO4) for optimum design and what improvements does it incur over designs that are either higher or lower than ...
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### Using Transistors as Logic Gates

I am curious if this could work. I have 3 inputs (A,B,C) and I know that Input A takes the longest to calculate. Is it possible to use single Transistors in place of normal AND Gates so that a signal ...
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### Why ring oscillator showing irregular graph ?

I'm trying to design ring oscillator in CADENCE using 180 CMOS .Instead of showing inverted clocking output , output changes in less then millivolt ranges. When I connect only 9 inverter like this ...
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### How can I have an ECL logic input for a CMOS logic gate

I'm working on a triggering system that uses a comparator to check if the signal is below a threshold value. I found a great comparator for the job, except its output is ECL logic. I wanted to use the ...
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I have designed amplifiers, using potential division method. What are the steps to design differential amplifier using inversion coefficient based design methodology? Please provide links/...
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### CMOS Inverter DC charecteristics steepness

I was trying to solve the following multiple choice question(only one option is correct). I simulated the inverter for varying W with L constant. What I found is the absolute value of dVout/dVin ...
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### How does this CMOS OTA with common-mode feedback work?

In class I learned about the circuit shown below. It is basically a simple CMOS OTA with a common-mode feedback realized by a resistive divider. But I am not quite sure how it works. Lets say that I ...
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### convert TTL/CMOS output signals to 0V and 5V [duplicate]

Is there an easy way to convert TTL/CMOS output signals to 0 and 5V? For example, if an ic outputs 0.1V as "0", I'd like to convert it to 0V and if it outputs something like 3.9V as "1", I'd like to ...
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### Will multiple chips outputing onto a bus for a few nanoseconds cause damage?

I'm working on a home-brew CPU design, with the usual mix of parallel EEPROMs, static RAMs and registers, tri-stated onto a single 8 bit bus. My /output-enable logic for three tristate-able chips on ...
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### How does an output switching from HI or LO to HI-Z effect an input in CMOS?

Let's say we have a tri-state buffer output connected to an inverter input, implemented in 7400 series CMOS chips. If the buffer output is HI, the inverter output is LO. If the buffer output is LO, ...
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### Analyzing a transistor relay driver

I found this circuit for a relay driver. It is similar to others I have seen, though it appears to have two extra parts that others do not have. I mostly understand how it works, but I would like to ...
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### Digital output won't go from 5V to 0V with a diode attached

Edit I did a poor job of soldering and forgot to solder the pull-down resistor on the input to the buffer. My mistake for posting a question too soon. I built a circuit to read a button with a ...