Skip to main content

Questions tagged [common-source]

A common source is one of the three basic FET topologies. It is distinguished by the fact that the input is at the FET's gate and the output is at the drain, leaving the FET's source as the "common" terminal. It typically exhibits high voltage gain but low bandwidth. Consider also using the "fet" or "mosfet" tag, as applicable.

Filter by
Sorted by
Tagged with
1 vote
0 answers
35 views

Output Noise of MOSFET with parallel current source

How can I calculate output noise voltage of the given circuit? Noise contribution of the M1 to output noise current: $$4kT\delta g_{m1}$$ Noise contribution of the RG to output noise current: $$4kTR_G[...
Aldrich Taylor's user avatar
1 vote
1 answer
64 views

Analyzing \$g_m\$ vs \$V_{in}\$ for a common source config

I had this doubt while going through the book "Design of Analog CMOS Integrated Circuits" by B. Razavi, if we are to plot \$g_m\$ vs \$V_{in}\$ for the above circuit, then we have \$g_m\$ =0 ...
wolff's user avatar
  • 13
0 votes
2 answers
79 views

For a MOS transistor, why is the maximum voltage of it be \$V_{dd}-V_{ov}\$?

Razavi stated that the maximum output swing at X or Y is equal to \$V_{DD}−(V_{GS}−V_{TH})\$ as shown in the following picture, the second picture is the Fig.4.3 I don't understand why the equation ...
Tong Su's user avatar
  • 113
1 vote
0 answers
72 views

What are the values for A1 and A2 in the output voltage?

I got this question wrong, but I am not sure why it is wrong. The only part of the question I got right was the time constant, which is 8 seconds. I have attached the question as an image. The ...
pgk's user avatar
  • 65
0 votes
0 answers
58 views

For a degenerated CS amp with current mirror would the small signal model include the current mirror

I am aiming to create an actively loaded degenerated CS amplifier and analyse the small signal performance in relation to maximum signal levels, maximum signal swing, voltage headroom requirements, ...
EEE22's user avatar
  • 21
1 vote
1 answer
88 views

Floating node of amplifier in LTSpice

I have been trying to create an actively loaded degenerated CS amplifier with current mirror in LTSpice and whilst working on other aspects of the amplifier the Vout node decided it was floating. I'm ...
EEE22's user avatar
  • 21
3 votes
3 answers
149 views

Is it always given that ground has lower resistance than output even If output is far closer in an inverting nmos? [closed]

Currently I'm learning about MOSFETs (N-MOS and P-MOS) --basically how a transistor works. My question is why does the current always prefer the grounding output even though it is further away than ...
Callidus's user avatar
1 vote
3 answers
199 views

Output level of common-source amplifier with PMOS load

Let's consider the common-source amplifier circuit above (left). This circuit does not have a well-defined output level. This part is easy to understand. In the book by Razavi, he says this "...
Leonhard Euler's user avatar
0 votes
1 answer
79 views

Why does the PMOS default straight to Triode in this common source amplifier? and how can I mathematically show it?

start by assuming both transistors are saturated. even though the title says otherwise I want to find the operating point of this circuit with these parameters. Vbiasn = 2V (relative to GND) Vbiasp =...
Josh Girgis's user avatar
0 votes
2 answers
425 views

MOSFETs as amplifier

I have used bipolar transistors as amplifiers but am having confusion regarding using MOSFETs as amplifiers. In the bipolar transistor case I use the simple formula of R2/R1 where R2 is the collector ...
user avatar
-3 votes
1 answer
152 views

What purpose do these capacitors have? [closed]

What is the purpose of Cc1,Cc2 and Cs and what is the normal range of these capacitors? Also what is Negative Feed Back(Rs) mean I can't understand it.
abdulkabeerQureshi's user avatar
0 votes
1 answer
139 views

CS amplifier feedback stability

I playing with JFET Common Source amplifier with feedback loop. I am simulating the design showed here. https://www.ti.com/lit/an/slpa018/slpa018.pdf?ts=1669662908797&ref_url=https%253A%252F%...
Peter Hrčka's user avatar
2 votes
3 answers
526 views

How to bias a common-source amplifier with a current-source load in moderate inversion?

I am using the gmid method to design a common-source amplifier. The gmid method forgoes the use of the square-law equations for lookup-tables/charts to provide accurate results when designing circuits....
Leonhard Euler's user avatar
1 vote
1 answer
141 views

Obtaining the expression of the noise figure for this common source

I'm trying to obtain the expression of the noise figure defined for this circuit : The transistor is in saturation, and strong inversion. The flicker noise can be ignored. Here is my attempt: For ...
Scipio's user avatar
  • 803
0 votes
1 answer
257 views

Biasing for complementary common-source stage amplifier

Why does no current flow through \$R_F\$ in the absence of signals in Fig 5.47(b)? This can only happen if \$V_x = V_\text{out}\$. How is that guaranteed??
alayoiskgfbfqhxjiw's user avatar
4 votes
3 answers
673 views

Help biasing this JFET buffer

I'm trying to make a simple JFET buffer but I am struggling to find clear instructions on how to calculate the bias resistors. I've built a circuit which nearly works, but I'm getting well below unity ...
jcansell's user avatar
0 votes
0 answers
48 views

Bipolar junction transistor circuit added after common source amplifier

I am studying for a class at university and our teacher gave us this circuit diagram and asked us to calculate the amplification, the DC version of the circuit and the small signal model for it. I ...
assassinduke's user avatar
2 votes
1 answer
1k views

Why is the saturation region linear in the Vds v/s Vgs graph?

Looking at the problem mathematically, we see the equations $$I_\text{ds}=k_n'(V_\text{gs}-V_t)^2$$ $$V_\text{ds}=V_\text{dd}-I_\text{ds} \times R_o$$ Following this, it would be predictable that \$V_\...
Janhvi's user avatar
  • 21
0 votes
0 answers
159 views

How to design a common source amplifier with active loading

I am quite new to amplifier. I want to design a common source amplifier. And here is my design in spice: Since the supply voltage is 6V. So i want my amplifier's operating point at 3V. So before i ...
Mirage's user avatar
  • 1
2 votes
0 answers
566 views

Calculation of power dissipation of a MOSFET circuit

As a part of an assignment to design a common source amplifier, I came up with this circuit: simulate this circuit – Schematic created using CircuitLab The transistor is a 180nm technology with ...
KaBe2003's user avatar
0 votes
0 answers
98 views

Need help understanding current source loading common source amplifier

For the circuit in the diagram, I observe that Vgs is around 3V and so is Vds on the breadboard. I do not understand if it is necessary to keep the drain at 1/2 of V1 as it is done when using a drain ...
cd2021's user avatar
  • 11
1 vote
1 answer
497 views

Input capacitance of common source amplifier

I am trying to find the input capacitance for the common source amplifier stage below: - I have tried to find \$C_{in} \$ by simulation. I apply a linearly increasing voltage source \$v_{in}(t) = 1 \...
Carl's user avatar
  • 4,145
0 votes
1 answer
137 views

Understanding the role of the FET in this opamp + Zener diode voltage regulator

I'm trying to repair my old audio CD player, and I've found a fault in or around this voltage regulator circuit (it's sourcing VCC for the DAC chip): I understand how the Zener + opamp work to ...
Violet Giraffe's user avatar
1 vote
1 answer
686 views

Common Source MOSFET Amplifier Biasing

While reviewing simple transistor amplifier biasing techniques I came across this paragraph in Microelectronic Circuits by Sedra & Smith. Here too we show the \$i_D–v_{GS}\$ characteristics for ...
Heymor's user avatar
  • 13
0 votes
0 answers
674 views

Common Source vs. Common Drain for N-Channel Switches

Most discrete load switches I have seen (Using N-Channel FETs) have been in the common-source configuration. What, if any, are the operational differences between this and the common-drain ...
Tim Vermilyea's user avatar
0 votes
1 answer
130 views

common source pole calculation vs. simulation

I would like to compare my pole simulation results to my hand calculations. I'm receiving quite a big error. When simulating a common source stage without an output capacitance load there is a big ...
Daniel Sapir's user avatar
0 votes
2 answers
777 views

Analysis of 3 stage common source ring oscillator

I have been attempting to analyze the following common source ring oscillator: I am having some trouble here. Based on my understanding, each stage of the FETs provides 270 degrees of phase shift ...
rkj's user avatar
  • 1
2 votes
7 answers
6k views

Why should we set input source equal zero for calculating output resistance of common source amplifier?

This lecture (page 10) gave derivation of common source output resistance. What I don't quite get here is why we should set the input source equal 0 for calculating output resistance. Why?
emnha's user avatar
  • 1,649
0 votes
1 answer
3k views

Common drain / source follower stage circuit analysis

I have been recently working on different types of MOS amplifiers and the following are my main doubts, When we have a high gain stage such as the common source stage we use the output of this stage ...
Bhuvanesh Narayanan's user avatar