All Questions
Tagged with computer-architecture alu
26 questions
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nand2tetris ALU Question
So im working on the ALU for the nand2tetris course online (for fun) and it's "design" is supposed to be as such:
...
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1
answer
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Alu Control output not return 010 for Addi instruction
I'm currently working on a project for a MIPS Datapath Simulation website. The project aims to demonstrate how instructions work. I've implemented the Alu Control Unit using the combinational logic ...
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3
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How to do signed 16-bit arithmetic on an 8-bit processor?
For example, to add two 16-bit numbers on my 8 bit machine, I add the low bytes together, then the high bytes together, and then add the carry flag to the high byte of the output.
This strategy falls ...
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2
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How is sll implemented in MIPS?
I don't understand how MIPS would implement the sll (shift left logical) instruction using the hardware present in its ALU as shown in the diagrams below. Would ...
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1
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Is it usual design that the addition operation in the arithmetic-logic unit is performed by default as other instructions are executed?
The book But How Do It Know? presents an 8-bit computer architecture in which arithmetic-logic instructions (that is, instructions which are executed by the ALU) have 1 as the most significant bit, ...
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1
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Why can't an Asynchronous CPU use a simple "completion bit" to signal completion?
I've been reading about how asynchronous CPUs work, but they always seem to involve some complicated way of communication. Wikipedia talks about a two-way and four-way handshake. I found a pdf from ...
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-1
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1
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Logisim: Implementing a control unit for "Addition", "Logic bitwise AND" and "right logic shift" in ALU [closed]
I'm very new to circuit design. I've built an ALU and now I only need a control unit for three operations, "Addition", "Logic bitwise AND" and "right logic shift". What ...
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3
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2
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830
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How are irrational numbers best represented and processed by computers?
My question is closely related to this one: How do computers understand decimal numbers?
However, that question deals with rational numbers only. I was wondering if irrational numbers can be ...
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3
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Would this type of design be scale-able? [closed]
With current technologies within a modern system, we have pushed the limits of computations within the CPU portion of the system where it now exceeds that of the memory units. Moving memory is slow ...
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2
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2k
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How many ALUs (and threads) are in a Pentium CPU?
I'm reading a book bottom up where it said:
The Arithmetic Logic Unit (ALU) is the heart of the CPU operation. It
takes values in registers and performs any of the multitude of
operations the ...
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40
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6
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Why does Intel's Haswell chip allow floating point multiplication to be twice as fast as addition?
I was reading this very interesting question on Stack Overflow:
Is integer multiplication really done at the same speed as addition on a modern CPU?
One of the comments said:
"It's worth nothing ...
- 557
4
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1
answer
753
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Microprocessor architecture bits vs bus sizes
I am ready following on this website:
"Another big difference between 32-bit processors and 64-bit processors is the maximum amount of memory (RAM) that is supported. 32-bit computers support a ...
- 1,489
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2
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267
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Choosing the best approach for data selection in a datapath
For a university project, I have to design and construct a very simple CPU including the ALU.
In order to select between different data lines that go into the ALU(32-bit data line), I have thought of ...
0
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2
answers
184
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Are floating point numbers denormalised before the processor performs arithmetic operations on them? [closed]
Does the processor denormalise the numbers in IEEE 754 notation and normalise the result after storing or are the arithmetic operations performed on the numbers as they are?
I'm asking because in case ...
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1
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347
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Need help understanding the status output generation of an ALU
I'm currently trying to implement a simple processor using Verilog in a FPGA. I'm using Mic - 1 architecture as a reference model.
The thing I can't understand is the ALU is generating a "status" ...
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1
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272
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Multiple data bit widths in a 4 bit adder?
So I am learning digital logic and have learned how to create an adder and have come across this question. So I am creating a 4 bit adder. To create the 4 bit adder I just make one 1 bit full adder ...
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4
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How does a computer deal with subtraction of 2 values that are in two's complement?
I'm confused how the computer calculates if there are two values A and B, both are in two's complement. Now we want do the ...
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3
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532
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Curious how does ALU addressing work like in Assembly code?
When writing assembly code, say R1 = R2 + R3, it is pretty easy to understand the addressing procedure because all registers are close to the ALU. But I find it hard to see how does the ALU go to the ...
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1
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796
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How to reduce an ALU logic with the minimum logic possible? Its very challenging
Our professor wants us to reduce 8-function ALU (8 outputs) to a 4 out ALU that has the capability to implement all the 8 functions. We can use any gates(even AOI's), muxes, and can create our control ...
- 201
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2
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I need help with verilog code, I am in trouble?
I am basically setting different control signals for the ALU to perform operations in verilog. But I have tried all possible ways of writing what I want but in vain, can you help me out. How should I ...
- 201
1
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1
answer
189
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How do you reduce an 8 output ALU to a 4 or 3 output ALU?
I can implement the functions in the picture below, but then if I implement them independently, I would have 8 outputs to the mux. Our professors wants us to reduce the ALU to only 3 or 4 outputs, I ...
- 201
1
vote
1
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983
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How is the zero flag set in terms of hardware? [duplicate]
I'm angling this as a general question on the assumption that it doesn't differ significantly with architecture - at least at the level I'm asking.
I'm curious how - in terms of hardware, not the ...
- 307
3
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2
answers
7k
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Is the registry file made from SRAM?
I study computer engineering and I read Hennessy's book about Computer Organization where it's described how the microprocessor does pipelining and that the microproceossor has on-chip cache, as much ...
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3
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2
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What's the difference between delayed branch and branch prediction?
I'm studying how delayed branch works and I'm trying to distinguish delayed branch from branch prediction. What is the difference? Is delayed branch a means to facilitate a control hazard?
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-2
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1
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174
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Running the linux kernel and ubuntu on a custom processor [closed]
This is hardly a theoretical question as many have done this, albeit there's very little information on the underlying processes.
I'm developing a custom MIPS-based processor on which I would like ...
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2
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6k
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Are 32-bit ALUs really just 32 1-bit ALUs in parallell?
I'm reading the high esteemed text Computer Organization where this picture is found that is supposed to represent a 32-bit ALU:
Is this technology really how it's done, just a lot of 1-bit ALUs, so ...
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