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3 votes
3 answers
522 views

For DDR4 and DDR5, is tCCD_l timing to be obeyed for accesses in a single row as well?

So I have been trying to learn about DDR4 and DDR5 memories, and it seems that the Column-to-Column delay values (in clock cycles) are different depending on whether consecutive accesses are inter-...
Kraken's user avatar
  • 343
0 votes
0 answers
359 views

Computer architecture: Count of RAM, ROM and I/O interface addressing

I am trying to work through this question and I appreciate any help or hint. Thank you Problem: A computer system uses RAM chips of size 512x8 and ROM chips of size 256x8. The computer system needs 4k ...
Node.JS's user avatar
  • 101
1 vote
1 answer
588 views

Where is the RAM stored on a RISC-V CPU? [closed]

Does RISC-V have any opinion on whether the RAM is stored on the same chip as the CPU (like on ARM devices) or on a separate chip somewhere on the motherboard (like on an x86 desktop)? I assume that ...
Aaron Franke's user avatar
1 vote
2 answers
468 views

What does the 8086 CPU do with the data returned from an address in RAM?

I understand how a CPU works fairly well, but there is this one thing which I've never really gotten the hang of. Say we have an Intel 8086 CPU (16 bits wide registers) which is about to fetch its ...
Frævik's user avatar
  • 35
0 votes
1 answer
487 views

Cache comparator usage

Referring to the photo below, in direct-mapping cache design, why we need a comparator to compare between the tag in the address and the tag in the cache? Isn't a valid bit enough?
NAND's user avatar
  • 498
3 votes
3 answers
5k views

Does Registers and RAM are same kind of memory?

Recently, I found out a YT channel of a man who build a 8-bit computer and explain how. In his video on the registers, he uses a D flip-flop, and in his other video on the ram, I understood that he ...
Ardakaniz's user avatar
  • 187
1 vote
1 answer
198 views

Interfacing RAM to a DIY computer

I am a relatively newbie to electronics but hopefully this question is not very non sensical: I am following a guide to build a 8 bit computer. The guide requires a RAM which has a 4 address bit and ...
pokiman's user avatar
  • 141
0 votes
1 answer
898 views

How to relate memory address to physical components in RAM?

I am trying to understand how are the micro-scale components arranged to relay address information to the Operating system software. What are the components that make up the ram which actually ...
Spandan's user avatar
  • 11
1 vote
1 answer
342 views

How do you store A or B in a RAM of a CPU datapath?

I have an assignment to make a CPU, but am confused with how f_left and f_right are going to be used. I think they are to store ...
user124627's user avatar
0 votes
3 answers
164 views

How is 'specific' data found and taken from a Semiconductor Memory Source?

In a semiconductor memory chip, each bit of binary data is stored in a tiny circuit called a memory cell consisting of one to several transistors. Volatile type. Suppose an application stored its ...
Sad CRUD Developer's user avatar
2 votes
2 answers
5k views

Differences, uses, and theory of volatile and nonvolatile memory?

I understand the basics of volatile and nonvolatile memory. Volatile memory requires a constant power supply to retain data whereas non-volatile memory does not require a constant power supply to ...
Josh's user avatar
  • 459
1 vote
2 answers
589 views

What is the reason of RAM modules conflicts in terms of computer architecture?

What is the reason of such conflicts? I read a book "Computer architecture" by Andrew Tanenbaum, but didn't understand the reasons may cause conflicts with memory with different timings, frequencies.
spyder's user avatar
  • 121