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Questions tagged [computer-architecture]

Computer architecture refers to both the design of a computer's external interfaces (instruction sets) and a computer's internal implementation (microarchitecture). The goal of these design decisions is to optimize speed, power efficiency, size, or cost while satisfying constraints on the rest.

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Why are NAND gates used to make AND gates in computers?

Why is this a standard for AND gates when it could be made with two FETs and a resistor instead?
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37 votes
5 answers
7k views

What exactly does ARM sell to vendors?

Assumptions: Computer architecture: Describes how the different modules of a processor interact with each other. A computer architecture is defined using vhdl ...
aiao's user avatar
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3 answers
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How does a computer chip read code, interpret it, and convert it into action? [closed]

I understand that binary is effectively functioning as a “virtual representation” of low voltage and high voltage. However, I do not understand how the instruction set to MAKE the voltage high or low ...
S.C.'s user avatar
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51 votes
5 answers
27k views

How can a CPU deliver more than one instruction per cycle?

Wikipedia's Instructions per second page says that an i7 3630QM deliver ~110,000 MIPS at a frequency of 3.2 GHz; it would be (110/3.2 instructions) / 4 core = ~8.6 instructions per cycle per core?...
davide's user avatar
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19 votes
2 answers
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How can a CPU dynamically change its clock frequency?

My Intel CPU changes clock speed depending on the usage, but how does it decide what clock speed to run at? Is the clock speed determined by the OS software using an algorithm, or is it hardware based?...
Chloe's user avatar
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16 votes
7 answers
13k views

Why do computers only use 0 and 1?

Why do computers only use 0 and 1? Won't the addition of other numbers such as 2 or 3 speed up computers? Also, 2 and 3 can be used to shorten the bit-length of integers (2 and 3 can be used to end an ...
Mark Zio's user avatar
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1 vote
1 answer
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8085 μp; Why does Read cycle take 3 T-states and not 2?

In the text I'm following, R.S.Gaonkar it's explained that, During T1, address in Program Counter(PC) is latched onto the Memory Address Register(MAR), During the falling edge of T2 \$\overline{MEMR}...
Aravindh Vasu's user avatar
52 votes
8 answers
9k views

Why is digital serial transmission used everywhere? i.e. SATA, PCIe, USB

While looking at SATA, PCIe, USB, SD UHS-II it struck me that they are all the same: digital serial bitstream, transmitted using differential pairs (usually 8b/10b coded), with some differences in ...
artemonster's user avatar
41 votes
6 answers
10k views

Is analog signal arithmetic faster than digital one?

Would it be theoretically possible to speed up modern processors if one would use analog signal arithmetic (at the cost of accuracy and precision) instead of digital FPUs (CPU -> DAC -> analog FPU -> ...
zduny's user avatar
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25 votes
8 answers
5k views

What are the advantages of using FPGAs over TTL in intro computer architecture?

I teach the one and only computer architecture course at a liberal arts college. The course is required for the computer science major and minor. We do not have computer engineering, electrical ...
Ellen Spertus's user avatar
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4 answers
203 views

Functional design implementation of computer system into actual physical hardware

I have recently started studying computer organisation and found that in most of the books the design of computer system is not discussed beyond functional design abstraction level (as shown in the ...
partykid's user avatar
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0 votes
2 answers
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barrel shifter using multiplexer: how to go about it

I am trying to under stand how to build a barrel shifter using multiplexers. I understand how the barrel shifter works but I don't get how you decide the number of multiplexers to use, and how the ...
eskoba's user avatar
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40 votes
6 answers
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Why does Intel's Haswell chip allow floating point multiplication to be twice as fast as addition?

I was reading this very interesting question on Stack Overflow: Is integer multiplication really done at the same speed as addition on a modern CPU? One of the comments said: "It's worth nothing ...
Nike Dattani's user avatar
39 votes
6 answers
3k views

Why is open hardware so rare? [closed]

I'm trying to understand why open hardware is so much harder to come by than software. I've tried looking around online and I couldn't find as satisfactory explanation. I understand that hardware is ...
Caustic's user avatar
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27 votes
6 answers
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Why are relatively simpler devices such as microcontrollers so much slower than CPUs?

Given the same number of pipeline stages and the same manufacturing node (say, 65 nm) and the same voltage, simple devices should run faster than more complicated ones. Also, merging multiple pipeline ...
Michael's user avatar
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11 votes
3 answers
2k views

What does it mean for a CPU to support a stack?

How can a CPU not support a stack? Doesn't any architecture that uses subroutines (I'm pretty sure that's all architectures) have to push the return address onto the stack so it can return to where it ...
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8 votes
2 answers
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Are 32-bit ALUs really just 32 1-bit ALUs in parallell?

I'm reading the high esteemed text Computer Organization where this picture is found that is supposed to represent a 32-bit ALU: Is this technology really how it's done, just a lot of 1-bit ALUs, so ...
Niklas Rosencrantz's user avatar
6 votes
8 answers
7k views

Why can computer circuits recognise only two states?

Computers can only understand binary (that is 0s or 1s). I want to know Is there any way that computers can understand more than 2 states. I know that It is much harder to build components that use ...
user avatar
6 votes
1 answer
7k views

4-bit decrementer using four Half Adders

Like the title mentions, is it possible to design a 4-bit decrementer using just four Half Adders? I know it's possible using 3 Full Adders + 1 Half Adder, but I don't seem to find a way to do that ...
ATK's user avatar
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5 votes
1 answer
16k views

How does the BSRR register work?

On the GPIOs of some ARM-based microcontrollers, you are given a register BSRR which you can write to to perform atomic changes in a ports output register. For ...
Taako's user avatar
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4 votes
4 answers
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2-bit branch prediction accuracy

I am trying to solve this problem, the answer should be 15/20 = 75%. However, I am not sure how this was calculated and want to understand the underlying concept. A program core consists of five ...
Carlo's user avatar
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3 votes
1 answer
323 views

Are `call` and `return` usually instructions in a modern ISA?

I've been working through the problems in a game based around building a Turing Complete machine. One of the final problems asks you to implement the call and ...
Connor's user avatar
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3 votes
2 answers
830 views

How are irrational numbers best represented and processed by computers?

My question is closely related to this one: How do computers understand decimal numbers? However, that question deals with rational numbers only. I was wondering if irrational numbers can be ...
Shashank V M's user avatar
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3 votes
1 answer
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what is microcoded architecture in computer architecture

I want to know what is microcoded microarchitecture of an instruction set architecture (ISA) and why is it used? What is the difference between microcoded architecture and single cycle ...
user2979872's user avatar
2 votes
3 answers
1k views

Sequential Circuits

I'm learning about sequential circuits, and it's driving me crazy. How can you use an output as input, what was it's value at time 0? It can't go on forever...
David's user avatar
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2 votes
4 answers
1k views

Why is asynchronous data transfer only suitable for slow devices?

I have read that asynchronous data transfer is wasteful of CPU time for slow devices like keyboard or mouse. Then how is it possible that it is suitable only for slow devices like keyboard or mouse ...
Anshul Gupta's user avatar
2 votes
1 answer
2k views

How to wire a system for Nios 2 in Qsys?

I've managed to reduce the number of errors but I still have some: ...
Niklas Rosencrantz's user avatar
1 vote
4 answers
2k views

How can a powersupply have a large input volt range

I see that computer power supplies that can take a voltage input of anything between 90V and 260V at a frequency between 47Hz and 63Hz. Meanwhile it can output power at a very precise voltage. How ...
KaareZ's user avatar
  • 123
1 vote
3 answers
1k views

How does ROM work? [closed]

ROM is a major part of a computer, and even more so in gaming consoles. How exactly do they work, and how can you make them with logic gates/transistors? I'm currently working on many projects, ...
Trevor Mershon's user avatar
1 vote
1 answer
189 views

How do you reduce an 8 output ALU to a 4 or 3 output ALU?

I can implement the functions in the picture below, but then if I implement them independently, I would have 8 outputs to the mux. Our professors wants us to reduce the ALU to only 3 or 4 outputs, I ...
user124627's user avatar
1 vote
0 answers
3k views

SAP-1 (Simple as Possible) W Bus

I'm currently investigating the SAP-1 to build in order to grasp a really good understanding of simple 8 bit computers. There are a few questions that I would like clearing up. What exactly is the ...
Jacob Clark's user avatar
1 vote
3 answers
1k views

clock signals in computers and machines [closed]

Why do computers have clock signals and clock rate, while ordinary machines do not have them? And why is clock so fundamental in CPU and mainboard?
Mark Oswarld's user avatar
0 votes
2 answers
2k views

What determines the number of bits for the address field in a cache memory?

I understand a cache memory is constructed for a basic block like this Valid bit | Address bits | Data/Instruction But what determines the length of the address bits? I understand that for a 32-bit ...
Niklas Rosencrantz's user avatar
0 votes
3 answers
164 views

How is 'specific' data found and taken from a Semiconductor Memory Source?

In a semiconductor memory chip, each bit of binary data is stored in a tiny circuit called a memory cell consisting of one to several transistors. Volatile type. Suppose an application stored its ...
Sad CRUD Developer's user avatar
-2 votes
0 answers
33 views

Implementing functional design of a computer system into physical hardware [duplicate]

I have recently started studying computer organisation and found that in most of the books the design of computer system is not discussed beyond functional design abstraction level (as shown in the ...
partykid's user avatar
  • 359
-2 votes
2 answers
187 views

Can synchronous data transfer be used for transferring large data in case of computer architecture and organization? [closed]

I am learning computer architecture and organization. I have this confusion, can synchronous data transfer be used for transferring large data in case of computer architecture and organization? I ...
Anshul Gupta's user avatar