Questions tagged [cortex-m0+]

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STM32L0: Fast processing of an analog sinusoidal signal

I have an embedded system based on a STM32 ARM Cortex M0+ microcontroller (STM32L051K6) and want to use it to convert an analog sinusoidal input signal into a digital pulse signal and do some SW ...
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1answer
60 views

SAMD09 Debug port connection issue

I have recently built a board using an ATSAMD09D14A-MUT, today it came the time to test it, however problems arose in a strangely annoying manner, when trying to connect to the device i get error 4109 ...
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1answer
632 views

Cortex-M0 vs. Cortex-M0+ for an IoT sensor using LoRA [closed]

Although I am an experienced software engineer, I am still quite a novice in electrical engineering. So please bare with me in explaining my requirements: I have a small garden in my backyard and I ...
2
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1answer
86 views

How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data?

How does the cortex m0+ processor use the ahb-lite interface to fetch instruction and data? Are instruction fetches done always using NONSEQ? How does it fetch data from memory(using burst or NONSEQ ...
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1answer
74 views

Cypress MCU strucks in Hard Fault Handler [closed]

I have started using Cypress MCU Cortex M0+ but I am seeing that Debugger always gets struck into Hard fault handler. Behaviour is random, sometimes it goes into hard fault handler at the start of ...
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1answer
90 views

Cortex-M0+ check if running under debugger control

I would like to check from my firmware if the MCU is running under debugger control. The MCU is a Cortex-M0+ KE06Z128. On M4 I used to check a bit in DHCSR. Even though this register exists in M0+, ...
3
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2answers
1k views

Must FreeRTOS task stack size account for interrupt stack size?

I have FreeRTOS running on a MKE06 Cortex-M0+ (based on SAMD20 demo), GCC toolchain. I am trying to figure out optimal task stack sizes (with the help of avstack.pl). I want to use only static memory ...