Questions tagged [cortex-m0+]

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2 answers
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How to get an ARM M0+ controller to retain it's last executed instruction after reboot?

I want to give my application a capability under which, in case of power off, the system retains last executed instruction and once the power is turned on again it RESUMES the program sequence. Is ...
Pritesh gupta's user avatar
1 vote
1 answer
619 views

STM32L0: Fast processing of an analog sinusoidal signal

I have an embedded system based on a STM32 ARM Cortex M0+ microcontroller (STM32L051K6) and want to use it to convert an analog sinusoidal input signal into a digital pulse signal and do some SW ...
user9564464's user avatar
1 vote
1 answer
114 views

SAMD09 Debug port connection issue

I have recently built a board using an ATSAMD09D14A-MUT, today it came the time to test it, however problems arose in a strangely annoying manner, when trying to connect to the device i get error 4109 ...
diegogmx's user avatar
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1 vote
1 answer
907 views

Cortex-M0 vs. Cortex-M0+ for an IoT sensor using LoRA [closed]

Although I am an experienced software engineer, I am still quite a novice in electrical engineering. So please bare with me in explaining my requirements: I have a small garden in my backyard and I ...
Sam Hammamy's user avatar
2 votes
1 answer
266 views

How does the Cortex M0+ processor use the AHB-Lite interface to fetch instruction and data?

How does the Cortex M0+ processor use the AHB-Lite interface to fetch instructions and data? Are instruction fetches done always using NONSEQ? How does it fetch data from memory (using burst or NONSEQ ...
Vignesh Dhamotharan's user avatar
1 vote
1 answer
176 views

Cypress MCU strucks in Hard Fault Handler [closed]

I have started using Cypress MCU Cortex M0+ but I am seeing that Debugger always gets struck into Hard fault handler. Behaviour is random, sometimes it goes into hard fault handler at the start of ...
anandamu16's user avatar
0 votes
1 answer
366 views

Cortex-M0+ check if running under debugger control

I would like to check from my firmware if the MCU is running under debugger control. The MCU is a Cortex-M0+ KE06Z128. On M4 I used to check a bit in DHCSR. Even though this register exists in M0+, ...
filo's user avatar
  • 8,901
5 votes
2 answers
3k views

Must FreeRTOS task stack size account for interrupt stack size?

I have FreeRTOS running on a MKE06 Cortex-M0+ (based on SAMD20 demo), GCC toolchain. I am trying to figure out optimal task stack sizes (with the help of avstack.pl). I want to use only static memory ...
filo's user avatar
  • 8,901