Questions tagged [counter]

A digital circuit that literally "counts" - it progresses through a sequence of states that are representative of some value. It need not count in a natural progression i.e. 1,2,3,4,5 etc. to be considered a counter (i.e. you can have different count sequences) each count value need not be of significance to other circuits (i.e. sometime it's sufficient that the counter counts to some value and then stops). Examples are Gray code, up/down counter.

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Problem updating Timer or Counter period on-fly for STM32L4 MCU

I'm trying to update TIM 2 period but it is not working. MCU is STM32L4 series Timer 6 is configured to trigger an event at every 1ms and Timer 2 is in counter mode which counts number of positive ...
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Analog step sequencer schematic help

I'm currently working on an analog step sequencer for a synthesizer I'm making. It has a split rail 24 V supply (so +12V, GND, -12V) and follows the Kosmo specification. The features I want are: 8 ...
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Cycling through 3 outputs on clock pulse component choice

Is there a better way to cycle through 3 outputs in a loop on clock input? I'm currently using a CD4017 with the 4th counter tied back to reset, and this does work well enough. The fact that it is a ...
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Prescaler vs Counter Period (STM32)

For timers on the stm32, there is the option of setting prescaler and counter period. I understood that the prescaler is dividing the frequency before using it for the counter. However, it seems to me ...
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How do I stabilize the pulse widths of the 4029 Binary Counter?

I am working with a CD4029BE on a breadboard. The connections are as follows: VDD to +12VDC VSS to ground The clock input receives a 3Hz 0 to +12V clock pulse J1-J4 are shorted together, and then ...
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How to create a mod-100 counter with two 7-segment displays using JK flip-flops?

Here is my whole diagram. There is no output while also clock is ticking... I think there is a problem with the counter, but I can't figure it out. I use rising-edge flipflops.
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Calculate and determine characteristic curve \$ U_{DAC}\$

A DAC circuit. Calculate \$ U_{DAC}\$ and its characteristic curve after 16 pulses. Know, \$ Q_A, D_0\$: LSB; \$ Q_D, D_3\$: MSB \$U_{DAC}=0.1N_x\$ (\$N_x \$ is value input of DAC) IC74191 is 4 bit ...
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How can I measure 400 kHz frequency?

I would like to measure a 400 kHz sine wave. I am thinking of converting the 400 kHz sine wave to a square wave using a Schmitt trigger and then measuring the signal with a microcontroller. Yes, the ...
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Show how two 74293 chips can be connected to become an 8-bit counter

In the logic symbol below, in order to create an 8-bit counter, how should I make the connections so that each 74293 chip (4-bit counter) can turn into an 8-bit counter? I know that in an asynchronous ...
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I need a low-cost oscilloscope that has event counter capability [closed]

I need to count the number of microstep pulses (generated by a microcontroller) being applied to a stepper motor controller. I would like to buy a low-cost (<$500) digital oscilloscope that has a ...
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Counter with 12 outputs

I have a 1Hz clock signal that I would like to run into an IC which has at least 12 outputs. Each clock pulse I would like the outputs to go high individually like an LED chaser. So all outputs but ...
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Complimentary PWM generation with timer IC [closed]

Provided PWM1, with frequency f and duty d, I need to generate PWM2 with frequency f and duty d but phase shifted 180 degree relative to PWM1. Requirements: small foot print, the board space is very ...
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1/60 Hz Counter/Divider

I have a fairly precise 1 Hz square wave that I would like to divide down to 1/60 Hz (1 pulse per minute). I want a one-chip solution and I am not having a lot of luck with this. I do not want a ...
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Logisim - Initializing a state on a counter

Full context: I am building a stopwatch / countdown timer. The design is that there will be up/down counters that increment/decrement the time. The counters are then connected to 7-segment displays to ...
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How can the minimal number of bits representing modulus of counter be smaller than the number of bits representing our output?

Suppose we want to have this sequence 30, 50, 1003, 30, etc... It's no hard to see that we need a MOD-3 counter because there're only 3 states. But this also means we need 2 flip flops. But how do we ...
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How to create 4-bit asynchronous counter?

I am new to Multimedia Logic and am trying to create a 4-bit asynchronous counter. I did something like this, but it doesn't work. I'm not sure if everything is properly connected and if I was using a ...
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4017 IC with tri-state output

I am looking for an IC whose functionalities would be same as 4017 IC's (that is a ring counter),but in addition to that I want a TRI-STATE output like mechanism (of course on the same chip) which ...
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Counter using only basic logic gates

I'm trying to make a counter (0 > 9) using only basic logic gates , I used the master slave jk flip flop and it work fine except that I don't know how to make it reset to 0 again after 9.
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Is it satisfactory for me to use the Clock speed to create a random 4-bit using a synchronous counter?

I want to implement a circuit that generates a random 4 bit using a synchronous counter. Is it satisfactory to achieve a "somehow" random generator by using a parallel 4-bit counter with the ...
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Multiple switches to independently control the counters

I just started studying electrical engineering this semester, and I'm currently working on the following counter to count the vacancy and occupied bed counts in a hospital for my school project: The ...
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Up or Down Counter? FPGA

I have a question related to the implementation of counters in an FPGA. I've read that it is better to implement down counters because when implementing up counters you need one additional comparator ...
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I'm looking for a component / circuit that distinguishes between eight states

I use PSpice For TI2020, so I don't have a pre-assembled ring counter in the library. I'm looking for a way of setting a specific output to High from eight states that come from 3 flip-flops (up ...
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Flipflop's output voltages are 0V

I'm building a 4-bit asynchronous up counter with D flip-flops. Unfortunately the 4 output voltages are always 0V. Can someone please tell me why? I had already placed a digital source in front of the ...
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Trying to make a mod-10 counter with JK flip-flops in CircuitMaker but my outputs are always coming out HIGH instead of counting, not sure whats wrong

Trying to make a mod-10 counter with JK flip-flops in CircuitMaker but my outputs are always coming out HIGH instead of counting, not sure whats wrong
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I need help with creating a ring counter (or sequential processing)

I have the following plans: I want to use a 555 timer in astable mode to light up 5 different LEDs. These should light up one after the other (i.e. not two at the same time). After that, there should ...
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4 way traffic light using 555 timer

I'm trying to build a 4-way traffic light controller in NI Multisim, using the 555 timer and a decade counter (no microcontrollers allowed). I used this as reference: https://circuits-diy.com/four-way-...
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Digital logic/sequential circuit to produce one pulse for every 5 clock pulses

I'm working on a problem where I'm trying to design a digital logic circuit (sequential circuit?) to produce output Y given input A: So the goal is to produce one pulse for every 5 input pulses. What ...
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How can I generate a 1 Hz clock from 100 MHz clock using VHDL?

How can I generate a 1 Hz clock from 100 MHz clock using VHDL? ...
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Verilog ring counter with skips

I want to try a counter starting from 0 to 12. It can be a simple counter. ...
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Why is my code output always showing 0?

This is a 4 bit counter code written using Verilog HDL on Quartus. Can somebody explain why is my output o always showing 0? Code in Text : ...
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Cascading counter pulses (strobes?) in Verilog

The basic gist is I'm trying to write an audio synthesizer. The note sequencer engine is based on a "tick" of 60Hz. Each note duration is a multiple of 5 ticks, let's call this a beat (even ...
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How does counter work with xor gate and 3 inputs [closed]

Given Then let's say start with the initial state is 0 0 1 as below, so the xor gate output 1. How can we find the next state for the given design? (The given solution for the next state is 1 0 0 ), ...
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Restarting a 555 timer

I recently came into ownership of a (sort of) arcade machine and I'm looking for a little help to figure out if it's possible to modify it. Long story short, the coin-op uses a simple circuit composed ...
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How to count individual cycles of a 24 GHz clocking signal? [duplicate]

Are there digital counters or similar circuits available that can count cycles or even half cycles (e.g., by threshold crossing) of a 24 GHz clocking signal? I am not looking for frequency counters ...
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74590 as 2 bit counter

I'm (ab)using a 74HC590 binary counter as a 2-bit counter. The storage register clock is directly connected to the counter clock. I'm feeding the inverted 4th bit (bit 3) of the counter into ~MRC (...
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Warning: Gated clock check: Net ... is a gated clock net sourced by a combinatorial pin... using clock divider with Basys3 FPGA

I am trying to use a divider in order to make a modulus 10 counter on a Basys3 FPGA. The frequency of the FPGA's clock is 100 Mhz. I am getting the following warning when I try to use the clock ...
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What is wrong with my modulo 13 asynchronous up counter?

I'm trying to design a modulo 13 asynchronous up counter with master slave JK flip flops. I connected the NAND gate to clear it when it reaches number 13, as shown in the figure. However, it continues ...
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LS7366R with multiple level-translated signals

For one of our projects, we are using two LS7366R ICs for interfacing with our two encoders. Our encoders operate at 5 V and we are supplying 5 V VCC to the LS7366 chips as well. However, our control ...
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Timing diagram and performance of Binary Counters

I have a binary counter which is the following : https://www.onsemi.com/pdf/datasheet/mc14020b-d.pdf I want to reset this counter with a signal. I want this signal to be the narrower, ie the length ...
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Digital Counters Counts Sample External Frequency Wrongly

Hi: Please see the attached schematic. I am experimenting with a circuit for sampling an external frequency. The counters do not always count correctly. At first I suspected the breadboard and I ...
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is it posssible to make a 4-bit up/down asychronous counter using jk flip flops, xnor gates and nothing else?

the image below is supposed to represent the last segment of the circuit, where the 'updown' input would change the direction of the counting: when updown=0 it counts backwards (f,e,d,...1,0,f...) ...
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JK Flip-Flop 0-9 up/down counter [closed]

I designed a 4-bit JK up/down counter. I want the circuit to be reset to 0 when counting up when it reaches 9, and to be reset to 9 when counting down when it reaches 0. Anyone know how ? I tried a ...
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STM32H7 32-Bit Counter with Reset, C Language Function

Need help a simple a 32-Bit counter with reset. Pseudo code: ...
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Looking for a 74LS "friendly" decimal counter or BCD to decimal decoder (similar to CD4017)

Without getting into too much detail: For my project I've been provided exclusively 74LS chips, but I need either a BCD to decimal decoder, or a decimal counter like the CD4017 for control signals. ...
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Problem simulating 2-bit counter with OrCAD

I used OrCAD Capture to create a 2-bit counter using two D-type Flip-Flops (DFFs). Here is the schematic: My problem is that I get no output when I try to simulate it. I know for sure that V3, the ...
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How to capture output of adder?

I am experimenting with a circuit for adding two numbers represented by two digital counters and two cascaded 4 bits adders (74HC283). I tested separately with cascaded 74HC163 and with asynchronous ...
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Is there a convention for figuring out the MSB and LSB on a counter IC?

Taking a look at the 74LS169, for instance, this IC has output pins Qa - Qd. I notice a lot of data sheets like these do not always specify which pin is the MSB or LSB of the count. Other than hooking ...
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4-bit counters not working properly

I have three SN74HC161N connected such that an overflow on the first triggers the second etc. (the normal ripple carry setup, where RCO feeds into ENT). The clock inputs of these are connected to a 1 ...
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Measuring Allan Variance

I have some microcontrollers with TCXO's where I wish to measure their frequency stability using Allan variance (from say 1ms to 10s). However, my measurement equipment is limited. I have access to a ...
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Help developing rpm calculation from encoder pulses

I have having a bit of difficulty calculating rpm of a motor using feedback from an encoder. The encoder datasheet is attached here: Encoder datasheet. The encoder has two channels at 1000 PPR, so ...
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