Questions tagged [counter]

A digital circuit that literally "counts" - it progresses through a sequence of states that are representative of some value. It need not count in a natural progression i.e. 1,2,3,4,5 etc. to be considered a counter (i.e. you can have different count sequences) each count value need not be of significance to other circuits (i.e. sometime it's sufficient that the counter counts to some value and then stops). Examples are Gray code, up/down counter.

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How to create 4-bit asynchronous counter?

I am new to Multimedia Logic and am trying to create a 4-bit asynchronous counter. I did something like this, but it doesn't work. I'm not sure if everything is properly connected and if I was using a ...
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4017 IC with tri-state output

I am looking for an IC whose functionalities would be same as 4017 IC's (that is a ring counter),but in addition to that I want a TRI-STATE output like mechanism (of course on the same chip) which ...
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Counter using only basic logic gates

I'm trying to make a counter (0 > 9) using only basic logic gates , I used the master slave jk flip flop and it work fine except that I don't know how to make it reset to 0 again after 9.
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Is it satisfactory for me to use the Clock speed to create a random 4-bit using a synchronous counter?

I want to implement a circuit that generates a random 4 bit using a synchronous counter. Is it satisfactory to achieve a "somehow" random generator by using a parallel 4-bit counter with the ...
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Multiple switches to independently control the counters

I just started studying electrical engineering this semester, and I'm currently working on the following counter to count the vacancy and occupied bed counts in a hospital for my school project: The ...
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Up or Down Counter? FPGA

I have a question related to the implementation of counters in an FPGA. I've read that it is better to implement down counters because when implementing up counters you need one additional comparator ...
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I'm looking for a component / circuit that distinguishes between eight states

I use PSpice For TI2020, so I don't have a pre-assembled ring counter in the library. I'm looking for a way of setting a specific output to High from eight states that come from 3 flip-flops (up ...
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Flipflop's output voltages are 0V

I'm building a 4-bit asynchronous up counter with D flip-flops. Unfortunately the 4 output voltages are always 0V. Can someone please tell me why? I had already placed a digital source in front of the ...
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Trying to make a mod-10 counter with JK flip-flops in CircuitMaker but my outputs are always coming out HIGH instead of counting, not sure whats wrong

Trying to make a mod-10 counter with JK flip-flops in CircuitMaker but my outputs are always coming out HIGH instead of counting, not sure whats wrong
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I need help with creating a ring counter (or sequential processing)

I have the following plans: I want to use a 555 timer in astable mode to light up 5 different LEDs. These should light up one after the other (i.e. not two at the same time). After that, there should ...
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4 way traffic light using 555 timer

I'm trying to build a 4-way traffic light controller in NI Multisim, using the 555 timer and a decade counter (no microcontrollers allowed). I used this as reference: https://circuits-diy.com/four-way-...
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Digital logic/sequential circuit to produce one pulse for every 5 clock pulses

I'm working on a problem where I'm trying to design a digital logic circuit (sequential circuit?) to produce output Y given input A: So the goal is to produce one pulse for every 5 input pulses. What ...
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How can I generate a 1 Hz clock from 100 MHz clock using VHDL?

How can I generate a 1 Hz clock from 100 MHz clock using VHDL? ...
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Verilog ring counter with skips

I want to try a counter starting from 0 to 12. It can be a simple counter. ...
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Why is my code output always showing 0?

This is a 4 bit counter code written using Verilog HDL on Quartus. Can somebody explain why is my output o always showing 0? Code in Text : ...
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Cascading counter pulses (strobes?) in Verilog

The basic gist is I'm trying to write an audio synthesizer. The note sequencer engine is based on a "tick" of 60Hz. Each note duration is a multiple of 5 ticks, let's call this a beat (even ...
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How does counter work with xor gate and 3 inputs [closed]

Given Then let's say start with the initial state is 0 0 1 as below, so the xor gate output 1. How can we find the next state for the given design? (The given solution for the next state is 1 0 0 ), ...
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Restarting a 555 timer

I recently came into ownership of a (sort of) arcade machine and I'm looking for a little help to figure out if it's possible to modify it. Long story short, the coin-op uses a simple circuit composed ...
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How to count individual cycles of a 24 GHz clocking signal? [duplicate]

Are there digital counters or similar circuits available that can count cycles or even half cycles (e.g., by threshold crossing) of a 24 GHz clocking signal? I am not looking for frequency counters ...
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74590 as 2 bit counter

I'm (ab)using a 74HC590 binary counter as a 2-bit counter. The storage register clock is directly connected to the counter clock. I'm feeding the inverted 4th bit (bit 3) of the counter into ~MRC (...
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Warning: Gated clock check: Net ... is a gated clock net sourced by a combinatorial pin... using clock divider with Basys3 FPGA

I am trying to use a divider in order to make a modulus 10 counter on a Basys3 FPGA. The frequency of the FPGA's clock is 100 Mhz. I am getting the following warning when I try to use the clock ...
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What is wrong with my modulo 13 asynchronous up counter?

I'm trying to design a modulo 13 asynchronous up counter with master slave JK flip flops. I connected the NAND gate to clear it when it reaches number 13, as shown in the figure. However, it continues ...
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LS7366R with multiple level-translated signals

For one of our projects, we are using two LS7366R ICs for interfacing with our two encoders. Our encoders operate at 5 V and we are supplying 5 V VCC to the LS7366 chips as well. However, our control ...
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Timing diagram and performance of Binary Counters

I have a binary counter which is the following : https://www.onsemi.com/pdf/datasheet/mc14020b-d.pdf I want to reset this counter with a signal. I want this signal to be the narrower, ie the length ...
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Digital Counters Counts Sample External Frequency Wrongly

Hi: Please see the attached schematic. I am experimenting with a circuit for sampling an external frequency. The counters do not always count correctly. At first I suspected the breadboard and I ...
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is it posssible to make a 4-bit up/down asychronous counter using jk flip flops, xnor gates and nothing else?

the image below is supposed to represent the last segment of the circuit, where the 'updown' input would change the direction of the counting: when updown=0 it counts backwards (f,e,d,...1,0,f...) ...
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JK Flip-Flop 0-9 up/down counter [closed]

I designed a 4-bit JK up/down counter. I want the circuit to be reset to 0 when counting up when it reaches 9, and to be reset to 9 when counting down when it reaches 0. Anyone know how ? I tried a ...
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STM32H7 32-Bit Counter with Reset, C Language Function

Need help a simple a 32-Bit counter with reset. Pseudo code: ...
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Looking for a 74LS "friendly" decimal counter or BCD to decimal decoder (similar to CD4017)

Without getting into too much detail: For my project I've been provided exclusively 74LS chips, but I need either a BCD to decimal decoder, or a decimal counter like the CD4017 for control signals. ...
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Problem simulating 2-bit counter with OrCAD

I used OrCAD Capture to create a 2-bit counter using two D-type Flip-Flops (DFFs). Here is the schematic: My problem is that I get no output when I try to simulate it. I know for sure that V3, the ...
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How to capture output of adder?

I am experimenting with a circuit for adding two numbers represented by two digital counters and two cascaded 4 bits adders (74HC283). I tested separately with cascaded 74HC163 and with asynchronous ...
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Is there a convention for figuring out the MSB and LSB on a counter IC?

Taking a look at the 74LS169, for instance, this IC has output pins Qa - Qd. I notice a lot of data sheets like these do not always specify which pin is the MSB or LSB of the count. Other than hooking ...
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4-bit counters not working properly

I have three SN74HC161N connected such that an overflow on the first triggers the second etc. (the normal ripple carry setup, where RCO feeds into ENT). The clock inputs of these are connected to a 1 ...
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Measuring Allan Variance

I have some microcontrollers with TCXO's where I wish to measure their frequency stability using Allan variance (from say 1ms to 10s). However, my measurement equipment is limited. I have access to a ...
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Help developing rpm calculation from encoder pulses

I have having a bit of difficulty calculating rpm of a motor using feedback from an encoder. The encoder datasheet is attached here: Encoder datasheet. The encoder has two channels at 1000 PPR, so ...
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How to get J/K counter to count from 2 - 9?

I have made this asynchronous counter (must be asynchronous) that using J/K flip flops that has to count from 2 to 9 and then reset to 2 and so on. I have managed to get it to count from 0 to 9, but I ...
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How to parameterize a clock divider?

The best clock divider is a PLL inside a FPGA. But the number of PLLs are limited. And sometimes using of counter to divide a clock is justified: ...
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Coarse counter giving incorrect pulse length measurements at high frequencies

I am using a simple counter to measure pulse length. I have copied the code below, but the counter increments by 1 at each positive edge of the clock. Once the counter is done incrementing for that ...
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VHDL Counter Design Question

Can I design a counter to increment on the clock rising edge? For example, I am tying to create a counter that increments on the rising edge of the clock if an input is a logic level 1. If the input ...
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Why can’t we use synchronous counters for high clk frequencies?

My professor said we can’t use synchronous counters for high clock frequencies. Is it because with many flipflops the delay becomes quite big and so the outputs change after the next triggering edge ...
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74f269 counter getting very hot

Hi I'm a DIY enthusiast and I got stuck with the circuit that I designed. The counter is getting very hot from the moment It's powered up. In my setup the 330Ohm resistors at the outputs are ...
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ESP32 + PC817 count 5v pump powered on

Before starting i'm a novice :) I'm tring to count each time a 5v pump is powered on. I build my sketch with a PC817. The reading works but each time i put the ESP32 in deep sleep mode it triggered as ...
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Anyone know how to hold a 74ls93? [closed]

I need to have a system where the 74ls93 holds and does not change until they are cleared. Does anyone know of a relatively simple way to do this? Edit: Nevermind all, figured out how to do it by ...
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Johnson counter using structural modelling in verilog

I'm trying to build a 4 bit johnson counter using JK flip flops and structural modelling. For the FF's themselves I'm using behavioral code and then instantiating them inside the counter module which ...
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Verilog Counter is not working

I am a beginner in Verilog and my counter is not working. I'm not sure what I'm doing wrong. Below, I will type my code. ...
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N-Pulse Oscillator

I want to build a circuit which, each time a button is pressed, outputs 'N' pulses from an oscillator. I'm working on a solution which uses a flip-flop to control a switch at the output of the ...
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Current source and electromagnetic interferance

I have a current source which has to be really precise in order to charge a capacitor and count a certain time (about 100 ms.) If anybody has seen a component which allows to count a time (without a ...
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2 votes
2 answers
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VHDL Counter not Working

I have code below for a counter that sets an output bit high or low depending on the count value being compared with a reference value. It is used to generate a PWM signal. During simulation, the ...
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How do I make a nanoseconds counter?

I want to make a counter that can count the time between pulses in nanoseconds. The counter starts to count when a pulse enters a pin (at the start of the pulse) then stops when a second pulse comes. ...
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JK Flip-Flop Counter: How to reset a counter?

I currently have a 3-bit asyncronous counter (built using J-K flip flops) that continuously counts up. However, I am struggling to figure out how to reset the counter to 0 when an input (Reset) is ...
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