Questions tagged [counter]

A digital circuit that literally "counts" - it progresses through a sequence of states that are representative of some value. It need not count in a natural progression i.e. 1,2,3,4,5 etc. to be considered a counter (i.e. you can have different count sequences) each count value need not be of significance to other circuits (i.e. sometime it's sufficient that the counter counts to some value and then stops). Examples are Gray code, up/down counter.

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Design Counter With Arbitrary Sequence Using Load

I'm trying to design an asynchronous counter with JK flip- flops, with an arbitrary sequence. The sequence is: 0, 1, 2, 3, 4, 5, 2 ? I know how to solve this kind of problems, but in this case how ...
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How to reset a 4026 counter IC when it reaches 6 for electronic dice

I'm trying to build a circuit to simulate a dice roll using a 555 in astable as it's heart. The output pulses are counted by a 4026 and then fed into a 4511 BCD to 7 segment decoder. It works ...
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52 views

Timimg of 4060 counter-oscillator

I'm using a CD4060B counter/oscillator and need to know the internal timing of the RESET operation. TI's 4060B datasheet says that the minimum input reset pulse width is 30 ns at 10 V, and ...
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222 views

Operation of a 74LS191 Counter

I would like to confirm if the implementation of my 74LS191 counter is correct. Here is a diagram of my circuit: The purpose of the circuit is to count from binary 0011 to binary 1111. However, the ...
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42 views

Counter Circuit starts from wrong number in Logisim

I'm trying to design a synchronous counter using J-K, T and D flip flop. It should count as "1, 3, 0, 2, 7" and 1 respectively. Everything works fine, i designed flip-flop tables and input-outputs ...
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4017 IC block diagram

I am really confused with the block diagram of 4017 IC. Here's the dataheet. I really can't wrap my head around the way they have taken the output for each count. They are just taking two flip to ...
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Unary-type input to binary output in Verilog?

I've built an FPGA-based circuit which outputs to \$n\$ ordered bits strings which take on the form of either \$k<n\$ \$1\$'s followed by \$n-k\$ \$0\$'s, or \$k\$ \$0\$'s followed by \$n-k\$ \$1\$'...
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36 views

pausing d flip flop output

I want to make a digital timer that counts to 99 minutes 59 seconds the problem is that i want to use 4 digit 7 segment display so i have to oscillate the input of the bcd to 7 segment display between ...
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18k views

Design a 3-Bit Up Synchronous Counter Using JK Flip Flop (odd vs even numbers)

I have to design 3-Bit Up Synchronous Counter Using JK Flip Flop counters. The first one should count even numbers: 0-2-4-6-0 The second one should count odd ...
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Ripple counters versus synchronous--pros, cons, and power consumption

Substantial edit--note that David Kessner's answer was written in response to the original posting; view the edit history to see what he was responding to From what I've read of digital design, there ...
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Preparing custom / arbitrary sequence counter

I know following types of counters: Asynchronous counter Clock input of each flip flop is output of earlier flip flop.[ref] Synchronous counter variant 1: with ANDing for flip flop inputs ...
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Ripple counter, reset problem (J-K flip flop counter)

I am trying to simulate a decade counter using a ripple counter 4 bits and a NAND gate to reset the 4 J-K flip-flops when it reaches 10 (1010). The thing is it does not reset but goes to 4 (0100) due ...
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Frequency Counter Using a PIC16F648A

I wonder if someone could help me with some general suggestions on a frequency counter project. I'm trying to modify a 6 digit LED frequency counter that uses an integral PIC16F648A, a 13 Mhz ...
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653 views

Simple number counter - PIC16F877A microcontroller problem

I am trying to make a simple counter using pic16f877a. I want to count each time a push button is pressed, that is taking one press as one count, regardless of how long the button is pressed. The ...
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1answer
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How to wire up a street light to change lights in specific states (digital circuit)

This is the final project for the only electronics course in my career. I have never taken any other electronics course and I'm seriously at a lost here. I need to score 100 here to pass the course. ...
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How do I know which logic gate I use to reset asynchronous counter?

I'm a High School senior. Our new teacher doesn't teach well at all and we have a test this Thursday. I don't know which gate to use with the counter(with JK flip-flops) to reset it. Or to set it(To ...
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What is a dc reset?

I read this sentence from a book: "MR is a dc reset". It said about master reset leg in a counter IC. I have been searching but found nothing related to this terminology. I wonder what a dc reset is?...
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4024 cmos counter not resetting

In my project, this section is faulty. I'm doing a bit-banging operation with shift registers and I'm trying to make shift register data reset after 15 bits are shifted out from the micro controller. ...
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Is the TC (“terminal count”) output of a 4-bit sync counter (74163) reasonably assumed to be glitch-free?

My gut tells me so, but the proof eludes me. Effectively this output is the AND of all four bits. These four bits go from 0 to 1 at very distinct times, assuming the counter is running at a ...
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136 views

RFID (or other) - Proximity Detector

I am trying to detect how often 2 animals 'interact'. Say I have 4 cats, I am trying to work out how often each of the cats interact with each other. I have considered using RFID tags attached to ...
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1answer
49 views

4-bit synchronous counter IC: Do I need to pre-synchronize the count enables? (Metastability?)

Using a 74LVC163 synchronous 4-bit binary counter and would like to predicate the counting on an asynchronous signal. If I apply this signal directly to one of the enables (e.g. CEP), am I assured ...
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293 views

Is there a way that only change one of result of d-flip flop?

I drow the ring counter schematic,but the last two flip flop simulation signal didn't "shift". My D-flip flop is designed as set=1,then Q=0; reset=1,then Q=1; set=1=reset,then Q=1,when D=1 occur at ...
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Implementing a simple counter using VHDL

Hi I'm trying to implement a counter with external control. I'm kinda new to VHDL and I keep getting syntax error for the following code. Can someone help me understand why there's an error here? <...
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Why IC CD4060BD in Multisim there is no pin for VCC and Ground? It's suppose in pin 8 and 16, but there is no such pin in Multisim

I really find it hard for finding the pin in Multisim, maybe it's because I don't know it yet, but there is no pin for ground and VCC for IC CD4060 in Multisim. Do you know which the pin for ground ...
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How to send to pulses to a CMOS Counter

I have tried to find answers to this many times, and the only solution I have been able to find is having two 555 Timers (or a 556) one in astable, and one in monostable. I could easily do this with ...
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234 views

Unable to trigger NPN Transistor from 4017 decade counter output

I am trying to make a unipolar stepper motor driver circuit. As a development landmark, I am trying to first run LEDs using the driver. Attached is my circuit. My 555 timer generates regular pulses ...
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88 views

Finding frequency of a series of pulses (3 - 60 Hz) without using a microcontroller or frequency-to-voltage converter

I came across an interesting yet challenging problem of finding the frequency of a series of pulses. The pulses can have a frequency anywhere from 1 to more than 100 Hz. The goal is to detect if the ...
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Bidirectional Counter implementation using internal counter

There was an assignment as follows: Design a two directional three-bit counter with the following functionality. the counter is changing its value on each positive edge of the clock. the counter's ...
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How do you make a digital counter circuit which counts to 10 minutes and 15 minutes, it will give a signs buzzer? [duplicate]

I asked in this site before, but apperantly I don't quite understand. I want to make a digital counter circuit which it counts to 15 minutes for my big project in my campus . When the circuit counts ...
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104 views

led chaser with non-mechanical shut-off option

I've seen thousands of standard led chaser circuits online but I haven't seen one in which I can shut off all LED's in a non-mechanical way. I'm wiring one pin of my chaser up to a microcontroller so ...
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Implementing 4-bit counter on GAL 16V8

I want to use a GAL 16V8 to implement a 4-bit counter using Verilog. I'm using Lattice's ispLEVER software. So far I have had no issues using Verilog to implement combinational logic. However, I ...
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2-Bit timer with 1 ms period

I am trying to find a simple hardware solution to implement a 2-bit timer that gives out 2-bits continuously repeating data 00, 01, 10, 11, 00, 01.... whose time period is approx 1ms. The accuracy and ...
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606 views

8-bit synchronous up/down counter [Logisim]

I am trying to create an 8-bit programmable up/down counter using D Flip flops. So far, this is what I have: The first 3 flip flops function correctly for both up and down, but the 4th doesn't. I ...
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Synchronous Up/Down counter which shows given sequence simultaneously on 5 x 7-segment displays

I was given a project to design a Synchronous Up/Down counter which displays my sequence (2,1,0,6,5) on 5 x 7-segment displays simultaneously. I started first by designing the Up/Down counter and ...
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Asynchronous Down Counter using D Flip Flops

After fixing my Up Counter, I'm having troubles writing structural verilog code for an Asynchronous 4-bit Down Counter using D Flip Flops. Here's the D Flip Flop code (which was tested and works): <...
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215 views

How can I implement this function with JK Flip Flop + NAND Gates

I have a problem about logic design. I need to design MOD 5 Up/Down Counter with control input x, when x=0 it will count down and when x=1 it will count up. I'm allowed to use only JK flip flop and ...
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How can i make my mod 10 up/down counter wrap from 0 to 9 when counting down?

I know there is something wrong with my reset logic because when counting down it starts from 5 and changes if i have any wires connected to the reset of the flip flops. I don't know how to fix this ...
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Desiging mod counter

I came across following question The 3 bit ripple counter is to be designed as MOD 4 counter. What should be the architecture of the ‘Logic gate’? A. a 3 bit input AND gate B. a 2 input AND ...
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565 views

74190 counter problem

So, I got my 74190 counter shows number like this 9-8-7-6-5-4-3-2-1-0-5-4-3-2-1-0-5-4-3-2-1-0-5-4-3-2-1-0 and so on. My questions: What can I do to change the output count down into 5-4-3-2-1-0-5-4-...
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Curious Behavior In Logisim while trying to mimic a halt instruction

I'm in the process of trying to simulate a halt instruction based on some arbitrary value. My circuit design may not follow best practices as I'm disabling the overall or master clock sign with a ...
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51 views

8-bits synchronous up counter with arbitrary sequence

My question is about logic design, that's a subject that I'm studying now, especifically counters and registers. I designed a 8-bit counter using 2 4-bit counters (with load, count and enable signal) ...
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66 views

Starting and stopping of a Mod N Counter for a FSM in Logisim

I'm working on a circuit for control logic. I'm using a 3 bit down counter. There is a control signal that when it goes high starts the counter by presetting it with a value of 5. The counter is ...
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50 views

karnaugh maps simplification

I'm in the process of making a JK arbitrary sequence counter and I'm now making the k maps to get a logic equation. I was just wondering if this is allowed (looping the bits around the middle bit) as ...
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How to choose resistors in a decade counter circuit?

I'll start off by stating that I am a novice. I'm trying to figure out how to use a decade counter, so I've constructed this circuit: It worked fine, but now I'm wondering how it was decided to ...
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268 views

4-bit Self-correcting Johnson Counter on D flip-flops

I had a task assigned by my teacher to implement self correcting Johnson Counter. The task goes this way: Design a self-adjusted 4 bit Johnson counter. Counter must be implemented on d flip flops ...
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Why is my seconds counter in verilog jumping values behaviour?

I am implementing a seconds counter on the Altera DE-1 Educational Board powered by the old Cyclone 2 FPGA. My plan is to make a 'down-clocker' that takes the on-board 50 MHz clock and produces a 1 Hz ...
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78 views

74LS74AN Binary Up-Counter

I have an issue with my binary up-counter using a 74LS74AN D-Flip Flop The issue is the following: I am trying to toggle the flipflop state by sending it a 1Hz Square wave (5V Peak) to make it toggle ...
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83 views

A 4bit counter that goes up and down

I am kinda new to the website, I just came across it after looking for answers for such a long time. I have an assignment that asks to add an input bit to your circuit from the circuit I created that ...
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128 views

8-Bit Program Counter Implementation

I'm trying to construct an 8-Bit Program Counter, in Logisim. It currently has functions LOAD, which makes the 8-Bit input (A0-A7) appear at the output (S0-S7) on the clock pulse: Loading 1 as input: ...