Questions tagged [counter]

A digital circuit that literally "counts" - it progresses through a sequence of states that are representative of some value. It need not count in a natural progression i.e. 1,2,3,4,5 etc. to be considered a counter (i.e. you can have different count sequences) each count value need not be of significance to other circuits (i.e. sometime it's sufficient that the counter counts to some value and then stops). Examples are Gray code, up/down counter.

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267 views

Trying to measure a pulse width and then send pulse of same width using Verilog

I am trying to write Verilog code which will measure the width of a pulse and then send a return pulse which has the same width. So far, I have created a counter which counts the number of periods ...
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32 views

What is wrong with my modulo 13 asynchronous up counter?

I'm trying to design a modulo 13 asynchronous up counter with master slave JK flip flops. I connected the NAND gate to clear it when it reaches number 13, as shown in the figure. However, it continues ...
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29 views

LS7366R with multiple level translated signals

For one of our projects, we are using 2 LS7366R ICs for interfacing with our two encoders. Now, our encoders operate at 5V and we are supplying 5V VCC to the LS7366 chips as well. However, our control ...
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3-Bit Up ASynchronous Counter Using JK Flip Flop

By using the excitation table for JK FF I was not able to get where the Values of JC KC came, specially the JC=X and KC=X states. I feel there are mistakes in the table for JC and KC column. Please ...
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110 views

Digital Counters Counts Sample External Frequency Wrongly

Hi: Please see the attached schematic. I am experimenting with a circuit for sampling an external frequency. The counters do not always count correctly. At first I suspected the breadboard and I ...
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37 views

Timing diagram and performance of Binary Counters

I have a binary counter which is the following : https://www.onsemi.com/pdf/datasheet/mc14020b-d.pdf I want to reset this counter with a signal. I want this signal to be the narrower, ie the length ...
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is it posssible to make a 4-bit up/down asychronous counter using jk flip flops, xnor gates and nothing else?

the image below is supposed to represent the last segment of the circuit, where the 'updown' input would change the direction of the counting: when updown=0 it counts backwards (f,e,d,...1,0,f...) ...
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Ripple counter, reset problem (J-K flip flop counter)

I am trying to simulate a decade counter using a ripple counter 4 bits and a NAND gate to reset the 4 J-K flip-flops when it reaches 10 (1010). The thing is it does not reset but goes to 4 (0100) due ...
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53 views

JK Flip-Flop 0-9 up/down counter [closed]

I designed a 4-bit JK up/down counter. I want the circuit to be reset to 0 when counting up when it reaches 9, and to be reset to 9 when counting down when it reaches 0. Anyone know how ? I tried a ...
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67 views

STM32H7 32-Bit Counter with Reset, C Language Function

Need help a simple a 32-Bit counter with reset. Pseudo code: ...
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104 views

How to capture output of adder?

I am experimenting with a circuit for adding two numbers represented by two digital counters and two cascaded 4 bits adders (74HC283). I tested separately with cascaded 74HC163 and with asynchronous ...
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206 views

What is a dc reset?

I read this sentence from a book: "MR is a dc reset". It said about master reset leg in a counter IC. I have been searching but found nothing related to this terminology. I wonder what a dc reset is?...
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Looking for a 74LS “friendly” decimal counter or BCD to decimal decoder (similar to CD4017)

Without getting into too much detail: For my project I've been provided exclusively 74LS chips, but I need either a BCD to decimal decoder, or a decimal counter like the CD4017 for control signals. ...
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Problem simulating 2-bit counter with OrCAD

I used OrCAD Capture to create a 2-bit counter using two D-type Flip-Flops (DFFs). Here is the schematic: My problem is that I get no output when I try to simulate it. I know for sure that V3, the ...
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Is there a convention for figuring out the MSB and LSB on a counter IC?

Taking a look at the 74LS169, for instance, this IC has output pins Qa - Qd. I notice a lot of data sheets like these do not always specify which pin is the MSB or LSB of the count. Other than hooking ...
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4-bit counters not working properly

I have three SN74HC161N connected such that an overflow on the first triggers the second etc. (the normal ripple carry setup, where RCO feeds into ENT). The clock inputs of these are connected to a 1 ...
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60 views

Measuring Allan Variance

I have some microcontrollers with TCXO's where I wish to measure their frequency stability using Allan variance (from say 1ms to 10s). However, my measurement equipment is limited. I have access to a ...
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79 views

Help developing rpm calculation from encoder pulses

I have having a bit of difficulty calculating rpm of a motor using feedback from an encoder. The encoder datasheet is attached here: Encoder datasheet. The encoder has two channels at 1000 PPR, so ...
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875 views

Using a counter to count how many clock cycles a signal is high using Verilog

I want to use a counter to count how many clock cycles an input signal is high. The issue I am running into is that once the input signal returns back to zero, my counter resets which causes my output ...
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1k views

Simple number counter - PIC16F877A microcontroller problem

I am trying to make a simple counter using pic16f877a. I want to count each time a push button is pressed, that is taking one press as one count, regardless of how long the button is pressed. The ...
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29 views

How to get J/K counter to count from 2 - 9?

I have made this asynchronous counter (must be asynchronous) that using J/K flip flops that has to count from 2 to 9 and then reset to 2 and so on. I have managed to get it to count from 0 to 9, but I ...
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12k views

In a JK Binary Counter from 0 to 9, why is the NAND gate connected to the second and fourth J-K flip flop and not the first and fourth?

In a binary counter design using 4 J-K flip-flops, that counts from 0 to 9, the flip flops are reset when the output from the 2nd flip flop NAND the 4th flipflop equals to 0. Since binary 9 is 1001, ...
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580 views

4024 cmos counter not resetting

In my project, this section is faulty. I'm doing a bit-banging operation with shift registers and I'm trying to make shift register data reset after 15 bits are shifted out from the micro controller. ...
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1answer
108 views

How to parameterize a clock divider?

The best clock divider is a PLL inside a FPGA. But the number of PLLs are limited. And sometimes using of counter to divide a clock is justified: ...
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52 views

Coarse counter giving incorrect pulse length measurements at high frequencies

I am using a simple counter to measure pulse length. I have copied the code below, but the counter increments by 1 at each positive edge of the clock. Once the counter is done incrementing for that ...
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398 views

Unable to trigger NPN Transistor from 4017 decade counter output

I am trying to make a unipolar stepper motor driver circuit. As a development landmark, I am trying to first run LEDs using the driver. Attached is my circuit. My 555 timer generates regular pulses ...
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68 views

VHDL Counter Design Question

Can I design a counter to increment on the clock rising edge? For example, I am tying to create a counter that increments on the rising edge of the clock if an input is a logic level 1. If the input ...
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48 views

Why can’t we use synchronous counters for high clk frequencies?

My professor said we can’t use synchronous counters for high clock frequencies. Is it because with many flipflops the delay becomes quite big and so the outputs change after the next triggering edge ...
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93 views

Anyone know how to hold a 74ls93? [closed]

I need to have a system where the 74ls93 holds and does not change until they are cleared. Does anyone know of a relatively simple way to do this? Edit: Nevermind all, figured out how to do it by ...
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104 views

74f269 counter getting very hot

Hi I'm a DIY enthusiast and I got stuck with the circuit that I designed. The counter is getting very hot from the moment It's powered up. In my setup the 330Ohm resistors at the outputs are ...
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38 views

ESP32 + PC817 count 5v pump powered on

Before starting i'm a novice :) I'm tring to count each time a 5v pump is powered on. I build my sketch with a PC817. The reading works but each time i put the ESP32 in deep sleep mode it triggered as ...
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142 views

How to send to pulses to a CMOS Counter

I have tried to find answers to this many times, and the only solution I have been able to find is having two 555 Timers (or a 556) one in astable, and one in monostable. I could easily do this with ...
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146 views

Johnson counter using structural modelling in verilog

I'm trying to build a 4 bit johnson counter using JK flip flops and structural modelling. For the FF's themselves I'm using behavioral code and then instantiating them inside the counter module which ...
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42 views

N-Pulse Oscillator

I want to build a circuit which, each time a button is pressed, outputs 'N' pulses from an oscillator. I'm working on a solution which uses a flip-flop to control a switch at the output of the ...
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538 views

How to design Gray code synchronous counters of large widths using SystemVerilog?

I want to design a synchronous gray code counter which is 10 bits wide in SystemVerilog. The counter should have an Active HIGH synchronous reset. I know how to design a 3 bit gray code counter like ...
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75 views

Verilog Counter is not working

I am a beginner in Verilog and my counter is not working. I'm not sure what I'm doing wrong. Below, I will type my code. ...
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65 views

Current source and electromagnetic interferance

I have a current source which has to be really precise in order to charge a capacitor and count a certain time (about 100 ms.) If anybody has seen a component which allows to count a time (without a ...
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195 views

led chaser with non-mechanical shut-off option

I've seen thousands of standard led chaser circuits online but I haven't seen one in which I can shut off all LED's in a non-mechanical way. I'm wiring one pin of my chaser up to a microcontroller so ...
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How do I make a nanoseconds counter?

I want to make a counter that can count the time between pulses in nanoseconds. The counter starts to count when a pulse enters a pin (at the start of the pulse) then stops when a second pulse comes. ...
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117 views

VHDL Counter not Working

I have code below for a counter that sets an output bit high or low depending on the count value being compared with a reference value. It is used to generate a PWM signal. During simulation, the ...
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31k views

Design a 3-Bit Up Synchronous Counter Using JK Flip Flop (odd vs even numbers)

I have to design 3-Bit Up Synchronous Counter Using JK Flip Flop counters. The first one should count even numbers: 0-2-4-6-0 The second one should count odd ...
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282 views

How can I implement this function with JK Flip Flop + NAND Gates

I have a problem about logic design. I need to design MOD 5 Up/Down Counter with control input x, when x=0 it will count down and when x=1 it will count up. I'm allowed to use only JK flip flop and ...
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262 views

JK Flip-Flop Counter: How to reset a counter?

I currently have a 3-bit asyncronous counter (built using J-K flip flops) that continuously counts up. However, I am struggling to figure out how to reset the counter to 0 when an input (Reset) is ...
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56 views

CD4060 with external clock pulse

I am trying to make realtime, low power 1hr audio indicator using binary counters. I don't need display so not using decade counters or 7 segment display ICs. So I bought bunch of CD4060 binary ...
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421 views

Design Counter With Arbitrary Sequence Using Load

I'm trying to design an asynchronous counter with JK flip- flops, with an arbitrary sequence. The sequence is: 0, 1, 2, 3, 4, 5, 2 ? I know how to solve this kind of problems, but in this case how ...
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Using a binary counter with ic sram

I am using the as6c62256 ic sram, this is the datasheet: datasheet I am trying to write 1000 words of 8 bit, and then read them from the sram is it possible to connect a binary counter to the adress ...
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How to reason about this 'adder with memory' circuit?

I'm reading through "Code" by Charles Petzold and I had a question about the following circuit illustrated in the book: Let's assume that the latches in the 16-bit counter and the 8-bit ...
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52 views

Digital downcounter not resetting

I have a digital down counter which is supposed to count from 9 to 0 and then it goes back to 9 (bottom) but it only goes back from 9 to 8 and then back to 9 and I don't understand how it works. Note ...
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46 views

How exactly does activating CLEAR cause an asynchronous modulus 12 counter to reset?

I'm confused about how Clear manages to reset the counter. The trigger is falling edge. Starting from where the counter is in the image (I'll refer to each JK flip-flop as F1 etc.): At first, we have ...

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