Questions tagged [counter]

A digital circuit that literally "counts" - it progresses through a sequence of states that are representative of some value. It need not count in a natural progression i.e. 1,2,3,4,5 etc. to be considered a counter (i.e. you can have different count sequences) each count value need not be of significance to other circuits (i.e. sometime it's sufficient that the counter counts to some value and then stops). Examples are Gray code, up/down counter.

76 questions with no upvoted or accepted answers
Filter by
Sorted by
Tagged with
2
votes
1answer
68 views

Timimg of 4060 counter-oscillator

I'm using a CD4060B counter/oscillator and need to know the internal timing of the RESET operation. TI's 4060B datasheet says that the minimum input reset pulse width is 30 ns at 10 V, and ...
2
votes
0answers
94 views

I’m having trouble solving this digital circuit. Help!

I need to design sequential logic circuit from this state diagram using only 2 D-latches. And this is my attempt: If I put it in the simulator it just gives me error and wont count. I assumed that ...
1
vote
1answer
104 views

How to capture output of adder?

I am experimenting with a circuit for adding two numbers represented by two digital counters and two cascaded 4 bits adders (74HC283). I tested separately with cascaded 74HC163 and with asynchronous ...
1
vote
1answer
68 views

VHDL Counter Design Question

Can I design a counter to increment on the clock rising edge? For example, I am tying to create a counter that increments on the rising edge of the clock if an input is a logic level 1. If the input ...
1
vote
1answer
48 views

Why can’t we use synchronous counters for high clk frequencies?

My professor said we can’t use synchronous counters for high clock frequencies. Is it because with many flipflops the delay becomes quite big and so the outputs change after the next triggering edge ...
1
vote
1answer
146 views

Johnson counter using structural modelling in verilog

I'm trying to build a 4 bit johnson counter using JK flip flops and structural modelling. For the FF's themselves I'm using behavioral code and then instantiating them inside the counter module which ...
1
vote
0answers
65 views

Current source and electromagnetic interferance

I have a current source which has to be really precise in order to charge a capacitor and count a certain time (about 100 ms.) If anybody has seen a component which allows to count a time (without a ...
1
vote
0answers
23 views

Designing a down counter using Xilinx ISE design

We are trying to design a circuit that counts down from 9.99 to 0.00. Could you give us some tips?
1
vote
0answers
42 views

Counter example

I am building a digital 1 bit counter. The function of the bit counter is: I have stored a value somewhere. I take this value and add 1(digital) if the stored value was 0 then the output value will be ...
1
vote
0answers
47 views

How i can automate a circuit using transistors instead switches?

I'm recycling the counter circuit of a microwave, for use it as a stopwatch, that turns on automatically, and start the count per seconds immediately when turns on, the circuit have two buttons "...
1
vote
1answer
267 views

Trying to measure a pulse width and then send pulse of same width using Verilog

I am trying to write Verilog code which will measure the width of a pulse and then send a return pulse which has the same width. So far, I have created a counter which counts the number of periods ...
1
vote
1answer
114 views

BCD Bi-directional counter with variable counting speed in proteus

I am working on a project. And its description is: Design a 3-digit counter which should has 4 buttons (up, down, right, left). with pressing the up button the counter should up-count for 5 seconds (...
1
vote
0answers
64 views

A Counter Which Counts Two Different Sequences

I have a question which asks me to design a counter which counts two different sequences. The question goes like this: Design a counter which counts 0,4,6,8,12,14. When the counter reaches 14, it is ...
1
vote
1answer
91 views

Implementing a counter using multisim

There was an assignment as follows: implement a counter which gets as an input of 8 pulses, 5 volts each, with frequency of 40K Hz, without using counter block, or any IC components. In the output ...
1
vote
0answers
82 views

Produce a clock out (5 MHz) with a counter and a clock in (50 MHz)

I'm trying to solve previous years' tests in logic design and there's this question that I can't really solve.. So, it gives me an 8-bit counter and a clock in (clk_in) of 50 MHz and it asks to ...
1
vote
0answers
56 views

Preparing custom / arbitrary sequence counter

I know following types of counters: Asynchronous counter Clock input of each flip flop is output of earlier flip flop.[ref] Synchronous counter variant 1: with ANDing for flip flop inputs ...
1
vote
0answers
69 views

LED Chaser using counting IC

Total beginner here, I'm trying to build an "LED Chaser" circuit using an IC (CD4022BE) that counts to eight (from zero to seven, and then it wraps around and goes back to zero). Before trying to ...
1
vote
1answer
195 views

led chaser with non-mechanical shut-off option

I've seen thousands of standard led chaser circuits online but I haven't seen one in which I can shut off all LED's in a non-mechanical way. I'm wiring one pin of my chaser up to a microcontroller so ...
1
vote
1answer
86 views

circuit that disconnects a connection

I'm designing a circuit that will disconnect a connection when 5 consecutive square wave pulses are missing. If less than 5 consecutive pulses are missing then I want to reset the counting process. <...
1
vote
1answer
282 views

How can I implement this function with JK Flip Flop + NAND Gates

I have a problem about logic design. I need to design MOD 5 Up/Down Counter with control input x, when x=0 it will count down and when x=1 it will count up. I'm allowed to use only JK flip flop and ...
1
vote
1answer
142 views

How to send to pulses to a CMOS Counter

I have tried to find answers to this many times, and the only solution I have been able to find is having two 555 Timers (or a 556) one in astable, and one in monostable. I could easily do this with ...
1
vote
0answers
74 views

IC for magnetic environments

I am working on a comparator circuit for converting a small AC signal to a digital (square) signal. The circuit is meant to be used in a strong magnetic environment, so the casing should not have ...
1
vote
0answers
98 views

Using a clock to increment a counter which drives a mux?

I am trying to program this functionality onto a Xilinx FPGA; however, when I program it to do this, I get no output. My situation is as follows: I have 12 bits of data (in parallel): the first 6 ...
1
vote
0answers
1k views

Clock Frequency for 4 digit 7 segment display in VHDL

I am using basys 3 and VHDL to create a stopwatch and I need to do it for both the 7 segment display of the basys3 itself and for a external 4 digit 7 segment display. I am given the clock divider ...
1
vote
0answers
83 views

Is this a ring counter ? What is its definition?

We can know the ring counter like :0000 -> 1000 -> 0100 -> 0010 -> 0001,it shifts the "1" bit. Here is my schematic,the same as the schematic from the internet,and because my d-flip flop is active ...
1
vote
0answers
101 views

Glitch on 7490 driving a 7441

Edit 1/1/17: I was going to take a picture of my NI Elvis breadboard as the first fee suggestions didnt work. I removed several ICs (counters) that I was going to use for the other digits and some ...
1
vote
0answers
134 views

clarification on a particular 555 implementation for 4017 johnson counters

I'm trying to build a 13 count johnson ring counter (which flashes LEDs sequentially 1 thru 13 and then repeats), and I found this circuit which looks perfect: I assembled it with an extra LED on the ...
1
vote
0answers
101 views

Relation between Digital frequency counter and temperature

This is a homework question, I can normally solve the problems on freqeuncy counter but I never did with temperature related frequency counter problems. A digital frequency counter has these ...
1
vote
2answers
206 views

What is a dc reset?

I read this sentence from a book: "MR is a dc reset". It said about master reset leg in a counter IC. I have been searching but found nothing related to this terminology. I wonder what a dc reset is?...
0
votes
0answers
110 views

Digital Counters Counts Sample External Frequency Wrongly

Hi: Please see the attached schematic. I am experimenting with a circuit for sampling an external frequency. The counters do not always count correctly. At first I suspected the breadboard and I ...
0
votes
1answer
38 views

ESP32 + PC817 count 5v pump powered on

Before starting i'm a novice :) I'm tring to count each time a 5v pump is powered on. I build my sketch with a PC817. The reading works but each time i put the ESP32 in deep sleep mode it triggered as ...
0
votes
0answers
42 views

N-Pulse Oscillator

I want to build a circuit which, each time a button is pressed, outputs 'N' pulses from an oscillator. I'm working on a solution which uses a flip-flop to control a switch at the output of the ...
0
votes
0answers
30 views

Using a binary counter with ic sram

I am using the as6c62256 ic sram, this is the datasheet: datasheet I am trying to write 1000 words of 8 bit, and then read them from the sram is it possible to connect a binary counter to the adress ...
0
votes
1answer
46 views

How exactly does activating CLEAR cause an asynchronous modulus 12 counter to reset?

I'm confused about how Clear manages to reset the counter. The trigger is falling edge. Starting from where the counter is in the image (I'll refer to each JK flip-flop as F1 etc.): At first, we have ...
0
votes
0answers
34 views

How to produce sound when a certain condition is met in proteus?

I've made a 6-bit counter with 6 JK flip-flops that can count from 1 to 33. After it reaches 33, the circuit will go back to zero. I want the circuit to produce a sound when the counter reaches 33. I ...
0
votes
0answers
213 views

Logisim - Counter with clock and Magnitude Comparator not working as expected

I have the next circuit in logisim: It is a simple 8 bit counter, with a magnitude comparator that outputs 1 when certain value is met. The problem is that if I simulate with a clock, the counter ...
0
votes
0answers
60 views

Counter with 4 flip flops jk synchronous from 1 to 12?

I wanted to create a circuit that would count from 1 to 12 to make hours counter for the digital clock. I work on logisim. I already made counter mod 13 but don't know how to adjust from 1 to 12 (not ...
0
votes
3answers
876 views

Using a counter to count how many clock cycles a signal is high using Verilog

I want to use a counter to count how many clock cycles an input signal is high. The issue I am running into is that once the input signal returns back to zero, my counter resets which causes my output ...
0
votes
1answer
69 views

Synchronous counter delay calculation

My Doubt is that, This is synchronous counter, all the flip-flop are activated simultaneously Right? Suppose at t=0 clock is activated then j0 and k0 will be activated instantly but my doubt is that ...
0
votes
0answers
44 views

Question About Arbitrary Sequence Counter and Changing the Sequence

hope you are all well. I have an homework which wants from me something like this: ...
0
votes
1answer
111 views

Why does my synchronous up counter count enable not function properly?

I have designed a simple 4-bit synchronous up-counter, using master/slave JK flip flops in Logisim. Here is my JK design: And my counter design: It works perfectly as intended, however if the INC (...
0
votes
1answer
85 views

3 bit synchrous up-counter stops at six but it need to be stop at seven

I am trying to design a 3-bit counter circuit with jk flip flops that count from 0 to 7 with a clock signal and remain constant at 7 until reset. Counter counts well but it stops at six not seven. My ...
0
votes
0answers
53 views

Why am I getting weird behavior when building 4-bit down counter?

I'm attempting to build a 4-bit modulo-10 down-counter (i.e 9,8,7...,1,0,9,8,7...0). Here is my code so far: ...
0
votes
0answers
81 views

Poor low frequency response of CD4060 IC

I have a question that involves a CD4060 ripple counter. My project is to design a counting circuit that turns off a relay after two hours. This can be done simply using an Arduino, but no ...
0
votes
0answers
67 views

Signal modulation at 38kHz using a 16-1 mux w/ 4bit counter

A little back story to what I am trying to achieve: I want to be able to control the bit pattern using DIP switches to send a controlled IR signal at 38kHz. I want to create a "game" where each IR ...
0
votes
1answer
1k views

Mod-3 asynchronous up counter using T flip flop in verilog

Design: ...
0
votes
0answers
198 views

Synchronous Up/Down counter which shows given sequence simultaneously on 5 x 7-segment displays

I was given a project to design a Synchronous Up/Down counter which displays my sequence (2,1,0,6,5) on 5 x 7-segment displays simultaneously. I started first by designing the Up/Down counter and ...
0
votes
0answers
63 views

Desiging mod counter

I came across following question The 3 bit ripple counter is to be designed as MOD 4 counter. What should be the architecture of the ‘Logic gate’? A. a 3 bit input AND gate B. a 2 input AND ...
0
votes
1answer
123 views

8-bits synchronous up counter with arbitrary sequence

My question is about logic design, that's a subject that I'm studying now, especifically counters and registers. I designed a 8-bit counter using 2 4-bit counters (with load, count and enable signal) ...
0
votes
1answer
65 views

Designing a counter

I want to design a counter which doesn't increments value every rising clock pulse(assuming positive edge triggered). Say I have a FSM which has 4 states . Only after traversing of the 4 states , I ...