Questions tagged [digital-logic]
Digital electronics treats discrete signals, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.
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What are these wiggly USB 3 traces on my motherboard?
I was taking a look at my motherboard, and I noticed the above traces on the USB 3.0 ports. I've included some components in the crop for scale.
What is the purpose of making these traces like this?
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The generic carry formula of CLA
I'm trying to learn about the CLA (Carry Look Ahead). I found out that the first four carries are:
I'm trying to build a generic formula for ...
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2answers
48 views
X86_64 Architecture, how does it handle instructions larger than 64 bits?
I have been looking more into how CPU's work, and have a question.
If I have a instruction that e.g. takes a 64bit address and a register, and copies the value from that address into the register. And ...
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2answers
72 views
Measuring wow and flutter of a phonographic turntable with digital equipment
Old school way to measure: 3000 or 3150 Khz test tone from test record played back through phono cartridge/preamp into wow/flutter/drift meter and for turntable that has an electronic adjustment to ...
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3answers
63 views
How does a “standard” ripple carry adder behave?
I came across the following problem:
A half adder is implemented with XOR and AND gates. A full adder is implemented with two half adders and one OR gate. The propagation delay of an XOR gate is ...
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Controlling motor card with NI 9472 DO module
simulate this circuit – Schematic created using CircuitLab
My goal is to simply turn on/off a 24VAC Motor. It is being driven by a card that I was originally just supplying 24VDC with from an ...
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2answers
52 views
Calculator keypad detection technique
I have a simple 8 digit calculator and want to use it in a way that instead of pushing the keys on keypad, connecting the keypad wire to an Arduino to control the calculator.
In general I know how ...
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1answer
51 views
Building a formula to pass n bits though the minimum number of circuts
I have a circuit X which has 4 inputs A0,B0,A1,B1 and 2 ...
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1answer
79 views
4-bit Self-correcting Johnson Counter on D flip-flops
I had a task assigned by my teacher to implement self correcting Johnson Counter. The task goes this way:
Design a self-adjusted 4 bit Johnson counter. Counter must be implemented on d flip flops ...
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5answers
82 views
Digital electronics - how does a circuit determine when some element (like adder) is done? (delay handling)
Take for example a ripple carry adder, how does a circuit handle delays of some elements?If ripple carry adder starts working from some clock cycle, we can't expect that it will have correct results ...
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1answer
98 views
Which of these is the correct circuit for JK flip-flop
Are both of these correct ? I am seeing both of these in different places
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63 views
74LS74AN Binary Up-Counter
I have an issue with my binary up-counter using a 74LS74AN D-Flip Flop
The issue is the following:
I am trying to toggle the flipflop state by sending it a 1Hz Square wave (5V Peak) to make it toggle ...
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3answers
81 views
How can output from a single logic gate/DIP switch supply input for multiple gates?
I have googled this quite profusely, and can't seem to find a straight answer. I am a consummate newb when it comes to electronics, so please forgive my ignorance.
I am wondering how it is possible ...
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1answer
86 views
What is the point of inverting RAM output?
The 74LS189 is a 4 bit RAM IC. The datasheet specifies that the output of the chip is inverted. Thus, if you put 1011 into address 1, when you read back address 1 ...
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2answers
83 views
Is it possible to make a Tri-State Bidirectional buffer without any tri-state buffers?
I'm currently making a computer on an application called Smart Logic Simulator. However, it doesn't have any tri-state buffers and therefor I cannot make a bus (based off the DM74LS245 chip). Is there ...
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109 views
What does PU / DO stand for in logic output? [closed]
I'm trying to figure out what does PU and DO stand for in this diagram below?
If my understanding for the PU/DO device is just only for the time in a cycle, so is my output correct?
Thank you
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2answers
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Converting signed hex integer to display negative decimal integer on terminal in C code
I am trying to take a signed hex number and display it on the terminal as a negative decimal number so that it can be easily read. I am having a hard time working through the logic on how to make this ...
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2answers
80 views
1.8v to 3.3v level shifter logic family [closed]
I have been looking for a level shifter capable of doing 1.8v to 3.3v. For whatever reason it seems almost everyone carries 2v to 3.3v shifter but 1.8v to 3.3v are few and far between. For practical ...
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23 views
mismatch in register delays between lib files and generated sdf file (Synopsis Design Compiler)
The recovery time in sdf file of register is unrealistic delay as it is 50ns and this not the only problem, but the same register in anther place in the design has recovery time 0.3ns ! and recovery ...
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44 views
Reverse engineering LCD signals on HP power supply
I have recently acquired an HP 6632A power supply and was inspired by Roberto Barrios' project of replacing the screen with an OLED display to do the same. However, it is evident that the 6632A is ...
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4answers
562 views
Use of Power Pins in ICs
This question might seem very basic, but it will help me a lot if someone can answer it from the basics!
I have just finished my first year at college and there was a course on digital design, where ...
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3answers
126 views
Why “Supports 5V VCC operation” appeared in LVC family datasheets?
Looking into the LVC logic chip family I was aure that it is 3.3 V supply devices. One of our fellows also confirms it here. This manual dated 1999 states that LVC is 5 V tolerant (version A), but not ...
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1answer
100 views
What's the difference between 74LVC1G74 and 74LVC2G74, finally?
I always thought that number before G in the part number is a number of identical gates in the chip. 1G08 is one AND gate, 2G08 is two AND gates in one package. ...
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1answer
38 views
Verilog - Wiring multiple hardware instances together
I am very new to Verilog and digital hardware implementation.
I want to instantiate multiple instances of a hardware block, place them side-by-side, then wire them together (ie. one block's output ...
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2answers
31 views
Verilog Generate statements: Syntax error near “<=”: unexpected <=
I am very new to Verilog, and I found the need to use "generate loops" to instantiate multiple hardware blocks. In this case, I am instantiating multiple "pe" blocks, a block which performs some ...
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2answers
138 views
How many transistors are there in a logic gate?
How many transistors are there in a logic gate?
If anybody asks me, I tell them:
A NOT gate is 1 transistor.
A NAND gate is 1 transistor per input.
A NOR gate is 1 transistor per input.
An AND gate ...
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1answer
44 views
Two Switches to Control a Pump
I have a water tank that I want to fill up with a well. I have a float switch at the top of the tank and another float switch in the middle of the tank. What I want to do is have the pump only turn on ...
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0answers
61 views
74AHCT244 did not output the required signal. What could be the problem?
I am using an STM32 to control my TLC5940, which uses different voltage levels. The circuit layout is in schematic shown above.
I wrote a small program to toggle my ...
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2answers
53 views
Why does cmos inverter consume power while discharging load capacitance?
Consider a simple CMOS inverter. To calculate the switching power dissipation, we consider the case when capacitor is charged till by pmos as the current is drained from Vdd. But when it is being ...
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1answer
77 views
Truth Table does not exhaust all combination. Can it be translated to a circuit? Is it ill-pose?
Step|A|B|C
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1 |0|0|1
2 |1|0|1
3 |1|1|0
4 |1|0|0
From the truth table above, I can not find the equivalent boolean expression hence I can not ...
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1answer
53 views
FT232R TTL Logic Levels
I have an FT232R chip hooked up to my oscilloscope with the TX and RX pins joined. I'm sending characters directly to it via Putty. The logic levels I am seeing are 5V low and 0V high. I thought the ...
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Enable input to an integrated circuit and button
Suppose i have a scheme that includes integrated circuit with enable input and i want to use mechanical switch in order to activate enable input. For example:
So i've heard that, whenever we are ...
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1answer
69 views
8-Bit Program Counter Implementation
I'm trying to construct an 8-Bit Program Counter, in Logisim. It currently has functions LOAD, which makes the 8-Bit input (A0-A7) appear at the output (S0-S7) on the clock pulse:
Loading 1 as input:
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1answer
56 views
How to implement an ON/OFF switch in a simple digital circuit?
I'm trying to find a way to implement a simple ON/OFF switch, alongside a START/STOP switch in a simple digital circuit. Here's an example simulation of what I did:
As you can see, I have some ...
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2answers
52 views
How to implement a Linear Feedback Shift Register in Verilog using for loops?
I tried implementing LFSR using Verilog , but I am unable to get the output properly, please check the verilog code for both module and test bench below:-
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37 views
Mealy machine for ring counter
I have to design Mealy machine for ring counter that can count up to 3 (0,1,2,3).
If the input is 1 it act as up counter and give 1 as output if current state (after input is given) value is odd.
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22 views
CAN Transciever kbps to Hz at TXD Pin
I am new to the CAN Bus and have designed an application example. The Transceiver I have chosen is TJA1044Gx.
The transceiver data sheet says :
I want to know if I have only Transceiver, Analog ...
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2answers
84 views
LED Matrix Light Leakage
I am controlling a 6x6 matrix of LEDs using a PLC with sourcing outputs and sinking outputs (24V). However, there is an issue with current leaking through to other lights.
For example, in the ...
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ripple-borrow binary subtraction circuit
How does this patented ripple-borrow binary subtraction circuit eliminate the need for doing two-complement conversion on the input, thus saves on hardware circuit computation area and time ?
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3answers
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Digital LOGIC MICROELECTRONIC
Whenever I have "input" which it could be HIGH AND LOW for example the input VIN to the CMOS INVERTER then we assume that the iput is 0 or vdd ! what's confusing me who said that high can't be VDD-VT ?...
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1answer
62 views
Help with following question about Muxes?
Could anybody provide help in answering this question? I'm pretty sure I should use a Kmap to analyze it but not sure how to do so.
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1answer
74 views
How do I show that this is an OR gate?
I need to go through the 4 cases where v1 and v2 are either 0V or 5V, and then use that to show the voltage value of the output, Vo is either low or high.
However, I think I'm hitting a contradiction ...
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1answer
55 views
Excessive Ground-Loop/Discontinuity?
I am designing PCB2 & PCB3 but PCB1 & PCB4 are set in stone.
My constraints are as follows:
1) The PMIC must be the 1st device to become alive.
2) As much as I would love to, I cannot use the ...
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1answer
50 views
Designing a counter
I want to design a counter which doesn't increments value every rising clock pulse(assuming positive edge triggered). Say I have a FSM which has 4 states . Only after traversing of the 4 states , I ...
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1answer
45 views
Need a simple explanation of a left-right shift register
I'm familiar with basic shift registers. I'm having a hard time understanding the one below. I feel like I'm overthinking it due its complicated appearance. Would it be possible to direct me to a way ...
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3answers
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Sizing the pulldown resistors for 74HCT08 logic inputs
I have come across some text or blog before but I cannot find the source that: when we use 74HCT08 AND gate IC and for the logic inputs if we use pulldown resistors to prevent floating then we need to ...
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3answers
58 views
How can I improve my 3 decade counter design so that it counts sequentially in Verilog [closed]
I am attempting to build and simulate a 3 decade BCD counter by cascading 3 decades counters that produce an output to indicate when the count of 9 is reached.
My design works, in that it counts ...
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1answer
76 views
“Tapping” an address/bus line
I'm very much an amateur tinkerer when it comes to electronics. My formal training amounts to the digital electronics requirements from my CS degree in the early 90s. I'm also a bit of a ...
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1answer
30 views
Pulse width stretching of the 0 pulse with a constant T [closed]
I have a digital output with varying pulse sizes and I want to design an IC to stretch the 0 output for a constant T+ "0" pulse time (as in attached picture).
I have tried using a monostable ...
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2answers
66 views
Can we prepare any ICs similar to decoder or demux , but for selecting multiple pins simultaneously?
It is possible to select the output pins sequentially using decoder or demux. But for selecting more than 2 output pins at same time, they don't work as the decoder /demux are single output selector ...
