# Questions tagged [digital-logic]

Digital electronics treats discrete signals, unlike analog electronics which treats continuous signals. Digital logic is used to perform arithmetic operations with electric signals and constitutes the base for building CPUs.

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### How can I switch between battery tracking mode and input voltage regulation mode on the BQ24210?

I'm trying to create a circuit in which a BQ24210 automatically switches between charging a battery via battery tracking mode and charging it via input voltage regulation mode. This is done by having ...
30 views

### Controlling a device in a car using a button and ignition

I need to connect a device to my car. I thought about using an XOR gate because: A - button B - car ignition. If the car's ignition is off (0), pressing the button (1) will turn on the device (1). If ...
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1 vote
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### Specific, practical examples of limits of logic gate fan-in?

I've been looking around for discrete, specific, and practical answers to the question "how many inputs can a (N)AND/(N)OR gate have?" as it relates to ASIC/VLSI/MOSFET/semiconductor ...
82 views

### How to approach the highlighted part of the question?

The boolean expression for Z for the four input module came out to be A0A1A2+A0A2A3+A0A1A3+A1A2A3 I am attaching my work here.
32 views

### Help Needed: Signal Inversion for E-Bike Brake Light System Using 60V Brake Levers [closed]

I'm working on an e-bike project and have run into a challenge with my brake light system. I need some advice on how to invert a signal for my brake light setup. The brake light should turn on when ...
48 views

### Delay in discharging of the capacitor for sequencing purpose

Our aim is to sequence 2 different power supplies i.e. 5 V and -48 V. On sequence is first "5 V is generated" and then "-48 V is generated" with 120 ms delay. Off sequence is first ...
1 vote
20 views

### RKJXT1F42001 Logic diagram

I'm looking into integrating an RKJXT1F42001 4-directional stick switch with encoder and center push function into a keyboard I am designing, but a little confused about the diagram. I want to make ...
47 views

### What's the real absolute maximum output voltage of the 74LVC07?

Datasheets for the 74LVC07, such as this one from TI, and this one from Nexperia, state that the absolute maximum output voltage for the open-drain outputs (in high state) is +6.5V. There is a table ...
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932 views

### Logitech G604 Mouse button switch circuitry does something... unusual...? Does anyone know why?

I was replacing switches on my Logitech mouse to resolve the infamous double-click issue. While I had my mouse apart for repairs, I decided to hook up an oscilloscope to witness the double-clicks ...
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355 views

### Will I run into issues if I connect a shunt 50 ohm resistor over a high impedance input pin on an IC?

I am using a level shifter with high impedance input pins. The input to the shifter is coming from a 50 ohm output impedance component through a 50 ohm line. For matching purposes and according to the ...
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56 views

### Clarification on getting 1 Hz from a 32.768 kHz input using 74HC4060BQ-Q100

I'm working on a project where I need to divide a 32.768 kHz signal down to 1 Hz. I initially thought I needed a Q14 output from a counter, similar to the CD4060 circuit where Q14 is passed to a D ...
28 views

### Unknown use 20 V injection in KNX Digital input (read switch status) gvs 4fold

This is a circuit that I've recreated from gvs 4fold digital input. There is common and wire that goes to 4 switches (this circuit only shows 1 of them) when it it's closed the microcontroller reads ...
1 vote
50 views

### I need help with the 4:1 MUX select probes? [closed]

I am making a DC motor (motor A) that is working under the following conditions: a) We have a 5 Hz clock signal, b) stops for 2 seconds, c) turns right for 4 seconds, d) stops for 3 seconds, e) turns ...
89 views

### Is this the correct way to create a circuit that convert a 7-bit number to either binary or gray code? (digital logic design)

I've created a circuit that gets a 3-bit code and changes it to either from binary to gray code (if c is low) or from gray code to binary (if ...
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62 views

### How do I find out how to realize this logic circuit? (digital logic design course)

It's a question with multiple subquestions: The first and second questions were to realize a 3-bit converter from gray code to binary and vice versa using at most 2 XOR gates, here are the results: (...
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51 views

### Problem with the triggering the 555 monostable trigger

I am currently making a dual speed dc motor circuit that is controlled by 555 timers. My goal is to have DC motor full speed below 2V and between 2-3V, the DC motor spins half-speed using PWM from 555 ...
117 views

### Is possible for information in a logical circuit to travel in the opposite direction as the current? [closed]

Is possible for information in a logical circuit to travel in the opposite direction as the current? I'm asking about theoretical possibilities, not the current status. For example, if circuits used ...
1 vote
57 views

### Creating ping-pong buffer using a simple dual port RAM

In this buffer, we have two sections. Let's call these A and B. At one time we write into one but read from the other. So we write into A and read from B, or we write into B and read from A. We can ...
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395 views

### Why do PALs have higher speed than PLAs?

When considering speed I have learned that PLAs are much slower than PALs. As each signal has to propagate through same sequence of gates (in series) why there is a speed difference?
180 views

### Bus contention - possible momentary short circuit with 74HC

I have a tristate bus where both input and output are controlled via 74HC573 latches, with only one latch OE (output enabled) active at any time. My concern is that the signal update from the control ...
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72 views

### Is it possible to use a 2 flip-flop synchronizer for reset?

I have seen designs for asynchronous resets synchronization like in this picture: I think I understand the asynchronous assertion and synchronous deassertion that this design delivers. I am not ...
48 views

### Lattice MachXO3LF FPGA Internal Clock Accuracy

On the data sheet for the Lattice MachXO3 FPGA family, it shows that the internal oscillator has varying nominal frequencies with +/- 5% accuracy. Does this apply to its entire temperature range ...
1 vote
58 views

### Issues with switch debouncing

I am having some issues with debouncing a switch with an RC filter and 74HC14 Schmitt-trigger inverter IC. I am using a standard circuit that is linked in the datasheet. The circuit in question here ...
1 vote
40 views

### Simplying a digital logic circuit to minimize propagation delay

The problem is a homework problem from the EDX Digital Logic class. Please avoid looking at the rest of the post if you don't want to know the solution. I've already attempted the problem and know the ...
60 views

### Where do I need give my inputs to this three stage master slave flip flop?

In his paper on TSPC logic, professor Razavi talks about use of the following topology as a master slave flip flop However, I don't know where to give input to this circuit while trying to simulate ...
79 views

### Getting PSSI to work via Rust on STM32

This will be more of a wider scoped question, as there is a lot that I am trying to understand here. Context: I am attempting to communicate with the 16bit-parallel data interface of a MAX11046 ADC ...
224 views

### Unused inputs and out puts on 74 series ttl logic chips

Hi I am using a 74ls38 quad 2 input nand buffer with open collector outputs and as well as a 74ls74 Dual Positive-Edge-Triggered D Flip-Flops with Preset, Clear and Complementary Outputs. On the nand ...
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801 views

### How much current can a 2N7000 MOSFET guaranteed switch with 3.3V logic

I still have problems to interpret the datasheets of MOSFETs. I have a 2N7000 from UTC (datasheet here). How much current can I guaranteed switch when I only have 3.3V from an Arduino? In my ...
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20 views

### Using 1.8V digital signals with TPS281C100A and AP22653A

I plan to use the following two devices: AP22653A and TPS281C100A and drive the enable pin from 1.8V logic. They are specified for minimum 3V3 operation, but for both inputs the VIH is 1.5V. Would ...
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297 views

### Is the resistor between the clock and the NPN needed?

I have a circuit that uses an NPN transistor inverter to invert a clock signal. The circuit calls for two resistors, a pull up and one in between the input signal. Virtually all of the circuits found ...
1 vote
37 views

### Voltage input low of nmos inverter with enhancement load

I have the following schematic in LTSPICE For each of these circuits I have to find the values for the VOH, VOL, VIL and VIH. To find the input voltages I observe the derivative of the V_out_NMOS ...
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1 vote
55 views

### How do i write my synopsis design constraint(sdc) for a generated clock with a variable frequency?

Here is what I got so far for my SDC: create_clock -name clk -period 20 -waveform {1.7 19} This is the part of my verilog code that derives a variable frequency ...
61 views

### Multiplexer with transmission gates

I have a multiplexer with 2 selection bits (S0 and S1), 4 inputs (x0, x1, x2, x3) and 1 output (y). The truth table for this circuit is the following: S1 S0 y 0 0 x0 0 1 x1 1 0 x2 1 1 x3 I also ...
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52 views

### Voltage drop in NMOS inverter with enhancement load

In the enhancement load NMOS inverter, why is the voltage drop across M2 at least equal to Vth when VIN is low ? Is it because for M2 when VIN is low the voltages VGS = VDS, so VDS > VGS - Vth and ...
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106 views

### Whats the error?

I'm trying to make a counter but Vivado display an error, and I cannot see what's the problem. As far as I know the design is correct. Someone can tell if I'm missing something, please.
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1k views

### Why isn't the CLK input manipulated directly in flip flops?

In Ben Eater's video he uses a circuit below to create a D-Flip-Flop with a LOAD pin. From my understanding, the circuit makes it so that the flip flop only loads in D1 or input when LOAD is high, ...
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168 views

### Well protected digital input with long wires

I've created simple circuit to protect MCU's digital input against eg. induced spikes. I want to connect quite long wires to this HW and highly probable that this board will be placed close to the ...
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1 vote
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### Output Variable stays unintialised in my VHDL testbench

I am pretty new to VHDL and was trying to write a VHDL simulation for a simple master-slave toggle flip flop. Following is the VHDL code that I have written: ...
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45 views

### Valid/Ready based streaming interface: Should control signals be registered?

There are variants of the control signals of streaming interfaces but basically there are two signals. One from the source is usually called valid. One from the ...
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51 views

### A good rising edge D Flip Flop CMOS implementation

I'm currently trying to create a basic CPU with SOT32 CMOS transistors. I have made a good design and architecture and began testing and ordering PCB's. However, I found that there are a lot of rising ...
89 views

### Start counting from 1 and go up to 9 | 7-segment Display

so I have this circuit in Falstad that counts up to 9 (from 0 to 9) but I need to it to count from 1 to 9. In falstad I am using a counter, 7 segment decoder and a 7 segment display. Any thoughts on ...
1 vote
54 views

### Verilog set bit counter

I'm trying to create a Verilog program that would display the digit with greater number of bits set. The code is working. However, it counts the bits from the previous values instead of its current ...
57 views

### Identifying unmarked IC in CNC controller board

I have a Camxtool v3.5 CNC controller (similar to this, although this is v3.4) that has an unmarked IC that I haven't been able to identify: The IC is connected between pin PB3 of the ATmega328P (...
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### ADC(MC3208) Interface Circuit Design

I am currently designing a Multi-ADC PCB for use different sensors, I've researched a range of different sources and would like some clarification on a few things before I finalise my design. I am ...
1 vote
97 views

### How to Resolve LINT-1 Warning During Synthesis?

I am currently working on the synthesis stage of a hardware design project and encountering a specific warning from the LINT-1. I'm seeking assistance to resolve this issue. Tool: design compiler ...
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1 vote
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### Synthesis with Verilog Parameter AUDIO_DW = 32 Results in LINT-1 Warning

I'm working on a Verilog project and encountering a warning during synthesis. When I set the parameter AUDIO_DW = 32, I get a ...
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### Passing Matrices (larger arrays) between modules

I'm trying to have my design be more compartmentalized and separate each task into different modules/source files. I basically want to pass a matrix and a vector into a module I created where I'll do ...
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### ARM Cortex-M Processor Reset Behavior

I am trying to understand the ARM cortex-M hardware behavior on reset; particularly how the SP and PC values are written upon a cold start or hard reset. A quick search did find a few similar ...