Questions tagged [digital-logic]

Digital electronics treats discrete signals, unlike analog electronics that treat continuous signals. Digital logic is used to perform arithmetic operations with electric signals, and constitutes the base for building CPUs.

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69 views

digital input levels based on another circuit (using a transistor switch?)

I would like to control some microcontroller¹ code based on the status of a push-button switch in an external 3.3V circuit via a digital input. The external circuit has a little under 3.3VDC going ...
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16 views

Modelling effects of unbuffered library characterization cell outputs on timing constraint tables

Can someone explain to me or point me to a resource that will shed some light on how (instead of using a buffered library cell, we use a unbuffered library cell) including the effects of unbuffered ...
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35 views

List of output currents in test conditions in CMOS buffer's datasheets

in datasheets of commonly used CMOS buffers output low voltages are given at specific currents (100uA, 4mA, 8mA, 12mA, 16mA). 100uA current shows that the buffer has CMOS output driver, but i still ...
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30 views

How to display Keyboard's binary to Digital waveform

How can I display to a monitor a digital waveform of any key when pressed in a keyboard? I was thinking to use an arduino or a raspberry. For example, when I press the small letter 'a' on a keyboard (...
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3answers
77 views

Design a combinational circuit with two inputs and four outputs. The output binary number should be the square of the input binary number

I don't know how the output expression for each output produced from the truth table. Can someone please explain how this output expression was dervied from the truth table? Problem: Design a ...
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1answer
46 views

Swap immune connector

I need to come up with a swap immune connector for a project of mine, and I can't come up with a simple design. The connector is supposed to connect PCBs of the same kind, however, an upside-down swap ...
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1answer
61 views

I am trying to implement a datapath using sequential logic . Trying to implement this C program

I was thinking of creating three registers , namely X, Y and Z. I initialize x and y to constants of '0', then I make register Z an active low register. I send a constant ' 0 ' to the input line of ...
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Logic gates to multiply [closed]

Say you have a 3-bit unsigned number X[2:0] (so X2 is the most significant bit, X1 is the next most significant, and X0 is the least significant). Using only standard gates (AND,OR, NOT), and constant ...
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Design a circuit which takes two inputs and outputs a 1 if and only if the two inputs are the same signal [closed]

You may only use two 2-Input AND gates, one 2-Input OR gate and two NOT gates. Can anyone help me?
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2answers
109 views

Do bubbles affect the delay?

So hello guys I am a first semester student in Computer Science. I have an exam coming up and I couldn't really find an answer whether bubbles affect the delay like inverters. The bubbles having no ...
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36 views

which kind of design of level shifter suitable for high frequency data transfeing in range of 1MHz?

A circuit needed to convert 3.3V and 5V logical voltage. However, the issue was that the circuit was supposed to handle very high data transfer at or above 1 MHz and up to 16MHz. I thought of ...
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1answer
94 views

Is this a good design for a 0…7 counter?

My daughter's electronics teacher recommends to realize a counter from 0...7 as follows: It shall give an output pulse (for a subsequent circuit) when the button is hit the 8-th time. For me this ...
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74 views

Produce a clock out (5 MHz) with a counter and a clock in (50 MHz)

I'm trying to solve previous years' tests in logic design and there's this question that I can't really solve.. So, it gives me an 8-bit counter and a clock in (clk_in) of 50 MHz and it asks to ...
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1answer
35 views

Need a modified S-R latch

I have a comparator output who is normally high and goes low from time to time. I need a latch which will change its output from high to low when the comparator's output change to low (and keep it ...
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62 views

XOR Gate implemented with BC547 transistors not working

I have checked and rechecked the wiring on my breadboard against the circuit shown in the schematic a dozen times and can't for the life of me understand why it is not working. Can anyone see a fault ...
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1answer
43 views

How many 6-input LUTs are necessary to synthesize any 10-variable switching function?

For example when we need an 8 variable function with 6 input LUT we require 5 LUTs , And hence it seems to me that for 10 variables we would need 3 (as 2 would give cumulative of 6 variables , and ...
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3answers
7k views

Puzzling behaviour from two inverters connected together

I'm an electronics newbie and I am puzzled by the behaviour of a circuit I have created. I have connected the output of one inverter to the input of another but the behaviour of the circuit is not ...
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25 views

KMAP Sum of Products - How to get the Simplified Function from the KMAP Table

I am answering a KMAP Sum of Products with don't care table but I don't know how to get the simplified function. Here's my progress: Problem: Q(C, O, D, E) = Σ(0,1,2,3,7,8,10) + d(5,6,11,15) The ...
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1answer
86 views

2's complement subtraction with overflow

I studied binary subtraction using 2's complement method and understood the rules, which say that after the subtraction process (actually addition) discard any carry in case it occurs and take the ...
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29 views

SR Latch confused about possible Race condition [duplicate]

Totally new to electrical and got confused when reading about SR Latch [ What I am not sure is when R=0 then 2nd input on nor gate comes from output of nor gate below where again only value provided ...
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2answers
72 views

Sequence Detector forced to wait a specific number of bits

So I have this little problem, where I am supposed to build a sequence detector which is forced to wait a specific number of bits before going into the reset state. It's kind of like pin codes work. ...
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1answer
38 views

What happens: n Hall effect sensors wired in parallel, < n of them is triggered?

This is almost certainly a noob-level question. I only have one Hall effect sensor to play around with so I can't test this out for myself. Say I have multiple Hall effect sensors wired like this, ...
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1answer
42 views

3 Bit Adder Logic Circuit Design

Im trying to design a logic circuit for a 3 bit adder using 6 inputs, A2, A1, A0, B2, B1, B0 and 4 outputs, s0, s1, s2 and c (the carry out). I already have circuits for a half adder, full adder and a ...
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1answer
54 views

Why is this D flip flop not working in LTspice?

Below is the circuit: I expect the Q1 Output should follow the clock since the DATA is set to one(5V), but the output is zero: I looked for many examples but couldn't figure out what is wrong.
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49 views

Usage of 74LVC1T45 in open-drain case

I want to do one 'universal' or 'multiprotocol'-capable IO block and currently thinking of using 74LVC1T45 level translator to do the communication between two different voltage leveled systems. I ...
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1answer
39 views

Help with understanding the mechanism of this parallel to serial shift register

Can the following shift register operation be explained step by step manner?: How does the MUX function? What happens at each clock is a bit confusing for me to interpret. I tried to figure out my ...
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1answer
37 views

Does RAM always use a big Mux to ‘read’ from its addresses?

I’ve designed a 64 bit (16 words * 4-Bits at each location) RAM in logic simulation software, using simple registers. I had to create a 16-to-1, 4-bit wide Mux (no mean feat) in order to ‘select’ one ...
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1answer
46 views

Converting SOP to POS form

The boolean function I want to convert is: F = xy' + yz' I will first convert it to canonical form: F = xy' + yz' ------> (1) = xy'(z + z') + (x + x')yz' = xy'z + xy'z' + xyz' + x'yz' = Σ(2, 4, 5,...
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108 views

How to build a calculator without use of arduino [closed]

I have been assigned to build a digital calculator without use of arduino. Can anyone please help?
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2answers
35 views

Ignoring setup delay

In synchronised circuit, if output of first IC is connected to input of second, should I bother about setup delay or will it work just fine? If not then what about longer chain? When will be an issue ...
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2answers
30 views

How does TXS0108E keep it's outputs at high impedance given it's internal block diagram?

I am trying to understand the block diagram of the TXS0108E bidirectional logic shifter. In the chip's description it says When the output-enable (OE) input is low, all outputs are placed in ...
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What are these types of logic diagrams called?

They are not quite "logic circuits" because when I look that up I get mostly the ones with logic gates drawn, not the transistors and such like these. Also if I wanted to find a book that would teach ...
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3answers
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Implementing ADD instruction for RiSC-16 processor

I'm trying to implement the RiSC-16 (not RISC) processor documented here using Verilog. The processor is really simple, however there is a problem when you try to perform ADD instructions ...
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1answer
63 views

FPGA elements complexity

I am confused as to the complexity of the elements shown below. What is the order of complexity of them? NOTE- this is a Pre-lab quiz which is NOT assessed, as seen by the multiple attempts allowed.
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3answers
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Circuit with two clocks

Most digital circuits can be built in more than one way. However, the easiest way I've seen to build an edge-triggered D flip-flop is with a pair of D latches. One has ...
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4answers
83 views

Digital clock source

I'm currently on an adventure into digital electronics. I've built a bunch of logic, but to test it I need a clock source. Is there a way I can “easily” construct a square-wave oscilator adjustable ...
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1answer
31 views

What IC can I use as controlled inverter [closed]

Pretty much I want to find an IC with the following structure: Inputs: I, a0...a7 Outputs: b0...b7 Where b0=a0 xor I, b1=a1 xor I, etc.
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2answers
120 views

Possible to use FPGA to emulate TTL logic ICs in existing circuit?

Is it possible to use an FPGA to emulate and 'replace' a damaged 7 series logic chip on an existing circuit board? For example, if I have a VCR or receiver that has a damaged 7 series logic IC, is ...
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1answer
53 views

sinusoidal bldc LUT synchronization

i trying to control 3 phase BLDC motor. I already done 6 step commutation which works fine. Now i going for sinusoidal control. Have studied more about sinusoidal control in bldc and got some idea. I ...
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2answers
52 views

Detect a sequence inside a bit stream

I was recently in a discussion with my professor in which he told me that 'absolutely in no way would this design work'. I am hoping I could bounce it off you guys. The question asked to design (in ...
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50 views

How can i connect laptop webcam RJ E85792 CK 77 94v-0 wire to usb cable

Camera wire colours Unshield Green Yellow Orange Red White Brown Unshield
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1answer
62 views

What is the difference between pulling up multiple digital IC pins to Vdd with a single resistor vs. one resister per pin?

I am not very good at understanding current, so I was hoping someone could help calrify the difference between pulling up multiple digital IC pins to Vdd with ...
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2answers
86 views

74HC14 waveform question

I am trying to get more familiar with using a 74HC14, as an experiment I have an ldr set up in a voltage divider configuration and the center tap goes to the input of the 74HC14 input 1. I have all ...
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1answer
62 views

Universal operator

XMN(A,B,C,D)=(A XOR B) NAND (C NOR D). Is XMN is universal operator? a. yes without constants. b. yes with 0 constant c. yes with 1 constant d. yes with OR gate. e. no. What does it means universal ...
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1answer
57 views

What would it take to add Bluetooth capability to a digital (musical) keyboard?

I am completely new to electrical engineering. I have a software background and have an interest in tinkering with hardware. I'm wondering what knowledge/engineering skill/equipment is required to ...
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1answer
53 views

Logic Synthesizer generates bad timings

I have a verilog code that describes a simple RAM. I use Genus synthesis tool to do synthesis, then generate a .sdf file for post-synth simulation. However, The tool generates .sdf file with faulty ...
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1answer
57 views

How is the propagation delay of a logic gate affected by the amount of inputs (fan in)?

I was trying to find out what parameters affects propagation delay and how. When trying to discover if somehow the propagation delay could increase with the increment in the amount of inputs in a gate,...
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1answer
34 views

Using LVC logic instead of AHCT

I need to power a 5V LCD display from a 3.3V microcontroller. On my breadboard I used 74AHCT125 level shifters powered at 5V. This worked fine. For the PCB version I have - mistakenly - ordered ...
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23 views

Why can we avoid race around condition in JK flip flop by setting the T/2 of clock < propagation delay of flip flop

As the title suggests, my question is that why we can avoid race around condition in JK flip flop by setting the T/2 (T is time period here) of clock < propagation delay of flip flop? The lecturer ...
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1answer
88 views

“Power On Reset” on CD4026 IC

I know it's needed to connect a capacitor from Vdd to Vss on 40XX IC's. Is it also useful on a CD4026 counter to connect the reset pin to one end of the capacitor to reset the IC to zero when powered ...

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